ST72F324BJ6T6 STMicroelectronics, ST72F324BJ6T6 Datasheet - Page 170
ST72F324BJ6T6
Manufacturer Part Number
ST72F324BJ6T6
Description
IC MCU 8BIT 32K FLASH 44-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F324BJ2T6.pdf
(198 pages)
Specifications of ST72F324BJ6T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-5590
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
ON
Quantity:
301
Company:
Part Number:
ST72F324BJ6T6
Manufacturer:
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Quantity:
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Company:
Part Number:
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10 000
Electrical characteristics
170/198
Figure 79. SPI slave timing diagram with CPHA = 0
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Figure 80. SPI slave timing diagram with CPHA = 1
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
MISO
MOSI
SS
MISO
MOSI
INPUT
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
CPHA=0
CPOL=1
CPHA=0
CPOL=0
OUTPUT
INPUT
OUTPUT
INPUT
INPUT
t
a(SO)
see
note 2
See note 2
t
t
su(SS)
t
a(SO)
su(SS)
t
HZ
su(SI)
t
t
w(SCKH)
w(SCKL)
t
su(SI)
t
t
w(SCKH)
w(SCKL)
Doc ID13466 Rev 4
MSB OUT
MSB IN
MSB IN
t
MSB OUT
c(SCK)
t
h(SI)
t
h(SI)
t
v(SO)
t
c(SCK)
t
v(SO)
Bit 6 OUT
DD
DD
Bit 6 OUT
and 0.7xV
and 0.7xV
Bit 1 IN
t
h(SO)
(1)
(1)
Bit 1 IN
DD
DD
t
h(SO)
.
.
t
t
f(SCK)
r(SCK)
t
t
f(SCK)
r(SCK)
LSB IN
LSB OUT
LSB IN
LSB OUT
t
h(SS)
t
h(SS)
ST72324B-Auto
t
dis(SO)
t
dis(SO)
note 2
See
see
note 2