ST72F324BJ6T6 STMicroelectronics, ST72F324BJ6T6 Datasheet - Page 85

IC MCU 8BIT 32K FLASH 44-LQFP

ST72F324BJ6T6

Manufacturer Part Number
ST72F324BJ6T6
Description
IC MCU 8BIT 32K FLASH 44-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F324BJ6T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-5590

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ST72324B-Auto
Note:
1
2
3
4
5
The OC1R register value required for a specific timing application can be calculated using
the following formula:
Where:
t
f
PRESC = Timer prescaler factor (2, 4 or 8 depending on the CC[1:0] bits; see
If the timer clock is an external clock the formula is:
Where:
t
f
When the value of the counter is equal to the value of the contents of the OC1R register, the
OLVL1 bit is output on the OCMP1 pin (see
The OCF1 bit cannot be set by hardware in one pulse mode but the OCF2 bit can generate
an Output Compare interrupt.
When the Pulse Width Modulation (PWM) and One Pulse Mode (OPM) bits are both set, the
PWM mode is the only active one.
If OLVL1 = OLVL2 a continuous signal will be seen on the OCMP1 pin.
The ICAP1 pin can not be used to perform input capture. The ICAP2 pin can be used to
perform input capture (ICF2 can be set and IC2R can be loaded) but the user must take
care that the counter is reset each time a valid edge occurs on the ICAP1 pin and ICF1 can
also generates interrupt if ICIE is set.
When one pulse mode is used OC1R is dedicated to this mode. Nevertheless OC2R and
OCF2 can be used to indicate a period of time has been elapsed but cannot generate an
output waveform because the level OLVL2 is dedicated to the one pulse mode.
Figure 45. One Pulse mode timing example
1. IEDG1 = 1, OC1R = 2ED0h, OLVL1 = 0, OLVL2 = 1
CPU
EXT
= Pulse period (in seconds)
= CPU clock frequnency (in hertz)
= Pulse period (in seconds)
= External timer clock frequency (in hertz)
Counter
OCMP1
ICAP1
IC1R
01F8
FFFC FFFD FFFE
OCiR = t
OCiR value =
Doc ID13466 Rev 4
OLVL2
*
f
EXT
Figure
t
- 5
PRESC
01F8
*
f
CPU
(1)
Compare1
2ED0 2ED1 2ED2
45).
- 5
OLVL1
2ED3
FFFC FFFD
2ED3
On-chip peripherals
OLVL2
Table
50)
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