ST72F324BJ6T6 STMicroelectronics, ST72F324BJ6T6 Datasheet - Page 131
ST72F324BJ6T6
Manufacturer Part Number
ST72F324BJ6T6
Description
IC MCU 8BIT 32K FLASH 44-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F324BJ2T6.pdf
(198 pages)
Specifications of ST72F324BJ6T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-5590
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
ON
Quantity:
301
Company:
Part Number:
ST72F324BJ6T6
Manufacturer:
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Quantity:
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Company:
Part Number:
ST72F324BJ6T6TR
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ST72324B-Auto
10.6
10.6.1
10.6.2
10-bit A/D converter (ADC)
Introduction
The on-chip analog-to-digital converter (ADC) peripheral is a 10-bit, successive
approximation converter with internal sample and hold circuitry. This peripheral has up to 16
multiplexed analog input channels (refer to device pin out description) that allow the
peripheral to convert the analog voltage levels from up to 16 different sources.
The result of the conversion is stored in a 10-bit Data Register. The A/D converter is
controlled through a Control/Status Register.
Main features
●
●
●
●
●
●
The block diagram is shown in
Figure 59. ADC block diagram
f
CPU
AIN1
AINx
AIN0
10-bit conversion
Up to 16 channels with multiplexed input
Linear successive approximation
Data register (DR) which contains the results
Conversion complete status flag
On/off bit (to reduce consumption)
Div 2
Div 4
Analog
MUX
EOC SPEED ADON
4
0
1
Doc ID13466 Rev 4
Figure
f
ADCDRH
ADC
59.
0
D9
ADCDRL
CH3
D8
CH2
D7
0
CH1
D6
0
CH0
D5
0
ADCCSR
D4
0
Analog to Digital
On-chip peripherals
D3
Converter
0
D2
0
D1
131/198
D0