MC9S08AC16CFJE Freescale Semiconductor, MC9S08AC16CFJE Datasheet - Page 172

• Manufacturer Part Number: MC9S08AC16CFJE
• Description: IC MCU 8BIT 16K FLASH 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08AC16CFJE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: S08AC
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Timer/PWM Module (S08TPMV3)
10.5.2
The two read-only TPM counter registers contain the high and low bytes of the value in the TPM counter.
Reading either byte (TPMxCNTH or TPMxCNTL) latches the contents of both bytes into a buffer where
they remain latched until the other half is read. This allows coherent 16-bit reads in either big-endian or
little-endian order which makes this more friendly to various compiler implementations. The coherency
mechanism is automatically restarted by an MCU reset or any write to the timer status/control register
(TPMxSC).
172
CLKS[B:A]
PS[2:0]
Field
4–3
2–0
Clock source selects. As shown in
three clock sources to drive the counter prescaler. The fixed system clock source is only meaningful in systems
with a PLL-based or FLL-based system clock. When there is no PLL or FLL, the fixed-system clock source is the
same as the bus rate clock. The external source is synchronized to the bus clock by TPM module, and the fixed
system clock source (when a PLL or FLL is present) is synchronized to the bus clock by an on-chip
synchronization circuit. When a PLL or FLL is present but not enabled, the fixed-system clock source is the same
as the bus-rate clock.
Prescale factor select. This 3-bit field selects one of 8 division factors for the TPM clock input as shown in
Table
the clock source selected to drive the TPM system. The new prescale factor will affect the clock source on the
next system clock cycle after the new value is updated into the register bits.
TPM-Counter Registers (TPMxCNTH:TPMxCNTL)
10-6. This prescaler is located after any clock source synchronization or clock source selection so it affects
CLKSB:CLKSA
Table 10-4. TPMxSC Field Descriptions (continued)
PS2:PS1:PS0
000
001
010
011
100
101
110
111
Table 10-5. TPM-Clock-Source Selection
00
01
10
11
Table 10-6. Prescale Factor Selection
MC9S08AC16 Series Data Sheet, Rev. 8
Table
No clock selected (TPM counter disable)
TPM Clock Source to Prescaler Input
10-5, this 2-bit field is used to disable the TPM system or select one of
TPM Clock Source Divided-by
Fixed system clock
Description
External source
Bus rate clock
128
16
32
64
1
2
4
8
Freescale Semiconductor