Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 111

• Manufacturer Part Number: Z8F083ASJ020EG
• Description: IC ENCORE XP MCU FLASH 8K 28SOIC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F083ASJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4558-5

Table 63. Sample Settling Time (ADCSST)
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
Bit
Position
[7:4]
[3:0]
SST
Sample Settling Time Register
Value
(H)
0h
0h - Fh
7
The sample settling time register, listed in
SAMPLE/HOLD signal is asserted before the START signal is asserted, which begins the
conversion. The number of clock cycles required for settling will vary from system to
system depending on the system clock period used. The system designer must program
this register to contain the number of clocks required to meet a 0.5 µs minimum settling
time.
Description
Reserved - Must be 0.
Sample settling time in number of system clock periods to meet 0.5 µs minimum.
6
Reserved
R
0
5
4
F74H
Table
3
1
63, is used to program the delay after the
Z8 Encore!
2
1
SST
R/W
Product Specification
Analog-to-Digital Converter
1
1
®
F083A Series
0
1
99