Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 74

IC ENCORE XP MCU FLASH 8K 28SOIC

Z8F083ASJ020EG

Manufacturer Part Number
Z8F083ASJ020EG
Description
IC ENCORE XP MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Datasheet

Specifications of Z8F083ASJ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
269-4558-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F083ASJ020EG
Manufacturer:
Zilog
Quantity:
363
Table 42. IRQ2 Enable High Bit Register (IRQ2ENH)
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
IRQ2 Enable High and Low Bit Registers
R/W
7
0
PA7ENH—Port A Bit[7] interrupt request enable low bit
PA6CENH—Port A Bit[6] or comparator interrupt request enable low bit
PAxENL—Port A Bit[x] interrupt request enable low bit
Table 41
registers
interrupts in the interrupt request 2 register. Priority is generated by setting bits in each
register.
Table 41. IRQ2 Enable and Priority Encoding
Reserved—Must be 0.
C3ENH—Port C3 interrupt request enable high bit
C2ENH—Port C2 interrupt request enable high bit
C1ENH—Port C1 interrupt request enable high bit
C0ENH—Port C0 interrupt request enable high bit
where x indicates the register bits from 0–7.
IRQ2ENH[x] IRQ2ENL[x]
0
0
1
1
(Table 42
describes the priority control for IRQ2. The IRQ2 enable high and low bit
R/W
6
0
Reserved
and
0
1
0
1
R/W
Table 43
5
0
Priority
Disabled
Level 1
Level 2
Level 3
on page 63) form a priority encoded enabling for
R/W
4
0
FC7H
C3ENH
R/W
Description
Disabled
Low
Nominal
High
3
0
C2ENH
R/W
Z8 Encore!
2
0
Product Specification
C1ENH
R/W
1
0
®
Interrupt Controller
F083A Series
C0ENH
R/W
0
0
62

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