Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 60

• Manufacturer Part Number: Z8F083ASJ020EG
• Description: IC ENCORE XP MCU FLASH 8K 28SOIC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F083ASJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4558-5

Table 23. Port A–D Pull-Up Enable Subregisters (PxPUE)
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
Note:
PPUE7
R/W
If 06H in Port A
7
0
PSMRE[7:0]—Port Stop Mode Recovery source enabled
0 = The port pin is not configured as a Stop Mode Recovery source. Transitions on this pin
during STOP mode do not initiate Stop Mode Recovery.
1 = The port pin is configured as a Stop Mode Recovery source. Any logic transition on
this pin during STOP mode initiates Stop Mode Recovery.
Port A–D Pull-up Enable Subregisters
The Port A–D pull-up enable subregister is accessed through the Port A–D control register
by writing
A–D pull-up enable subregisters, enables a weak internal resistive pull-up on the specified
port pins.
PPUE[7:0]—Port pull-up enabled
0 = The weak pull-up on the port pin is disabled.
1 = The weak pull-up on the port pin is enabled.
Port A–D Alternate Function Set 1 Subregisters
The Port A–D alternate function set1 subregister is accessed through the Port A–D control
register by writing
alternate function set 1 subregisters select the alternate function available at a port pin.
Alternate functions selected by setting or clearing bits of this register are defined in
Alternate Functions
Alternate function selection on port pins must also be enabled as described in
Alternate Function Subregisters
PPUE6
R/W
06H
6
0
–
D Address Register, accessible through the Port A
to the Port A–D address register. See
07H
PPUE5
on page 38.
R/W
5
0
to the Port A–D address register. See
PPUE4
on page 45
R/W
4
0
.
PPUE3
R/W
3
0
Table
PPUE2
R/W
Z8 Encore!
23. Setting the bits in the Port
2
0
Table 24
General Purpose Input/Output
Product Specification
–
D Control Register
PPUE1
R/W
on page 49. The
1
0
®
F083A Series
Port A–D
PPUE0
R/W
GPIO
0
0
48