Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 95

IC ENCORE XP MCU FLASH 8K 28SOIC

Z8F083ASJ020EG

Manufacturer Part Number
Z8F083ASJ020EG
Description
IC ENCORE XP MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Datasheet

Specifications of Z8F083ASJ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
269-4558-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F083ASJ020EG
Manufacturer:
Zilog
Quantity:
363
PS026308-1207
TEN—Timer enable
0 = Timer is disabled.
1 = Timer enabled to count.
TPOL—Timer input/output polarity
Operation of this bit is a function of the current operating mode of the timer.
ONE-SHOT Mode
When the timer is disabled, the timer output signal is set to the value of this bit. When
the timer is enabled, the timer output signal is complemented on timer reload.
CONTINUOUS Mode
When the timer is disabled, the timer output signal is set to the value of this bit. When
the timer is enabled and reloaded, the timer output signal is complemented.
COUNTER Mode
If the timer is disabled, the timer output signal is set to the value of this bit.
If the timer is enabled the timer output signal is complemented after timer reload.
0 = Count occurs on the rising edge of the timer input signal.
1 = Count occurs on the falling edge of the timer input signal.
PWM SINGLE OUTPUT Mode
0 = Timer output is forced low (0), when the timer is disabled. The timer output is
forced high (1), when the timer is enabled and the PWM count matches and the timer
output is forced low (0), when the timer is enabled and reloaded.
1 = Timer output is forced high (1), when the timer is disabled. The timer output is
forced low(0), when the timer is enabled and the PWM count matches and forced high
(1) when the timer is enabled and reloaded.
CAPTURE Mode
0 = Count is captured on the rising edge of the timer input signal.
1 = Count is captured on the falling edge of the timer input signal.
COMPARE Mode
When the timer is disabled, the timer output signal is set to the value of this bit. When
the timer is enabled and reloaded, the timer output signal is complemented.
GATED Mode
0 = Timer counts when the timer input signal is high (1) and interrupts are generated
on the falling edge of the timer input.
1 = Timer counts when the timer input signal is low (0) and interrupts are generated on
the rising edge of the timer input.
CAPTURE/COMPARE Mode
0 = Counting is started on the first rising edge of the timer input signal. The current
count is captured on subsequent rising edges of the timer input signal.
1 = Counting is started on the first falling edge of the timer input signal. The current
count is captured on subsequent falling edges of the timer input signal.
Z8 Encore!
Product Specification
®
F083A Series
Timers
83

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