Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 113

• Manufacturer Part Number: Z8F083ASJ020EG
• Description: IC ENCORE XP MCU FLASH 8K 28SOIC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F083ASJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4558-5

Table 65. ADC Clock Prescale Register (ADCCP)
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
Bit
Position
[0]
DIV2
[1]
DIV4
[2]
DIV8
[7:3]
ADC Clock Prescale Register
Value
(H)
0
1
0
1
0
1
0h
7
The ADC clock prescale register, listed in
clock to the ADC. When this register is programmed with
the ADC clock. DIV8 has the highest priority, DIV2 has the lowest priority.
Description
DIV2
Clock is not divided
System clock is divided by 2 for ADC clock
DIV4
Clock is not divided
System clock is divided by 4 for ADC clock
DIV8
Clock is not divided
System clock is divided by 8 for ADC clock
Reserved - must be 0.
6
Reserved
5
0
4
F76H
R/W
Table
3
65, is used to provide a divided system
DIV8
0h
Z8 Encore!
2
0
, the system clock is used for
Product Specification
Analog-to-Digital Converter
DIV4
1
0
®
F083A Series
DIV2
0
0
101