Z8F083ASJ020EG Zilog, Z8F083ASJ020EG Datasheet - Page 39

IC ENCORE XP MCU FLASH 8K 28SOIC

Z8F083ASJ020EG

Manufacturer Part Number
Z8F083ASJ020EG
Description
IC ENCORE XP MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Datasheet

Specifications of Z8F083ASJ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4672 - KIT DEVELOPMENT F083A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
269-4558-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F083ASJ020EG
Manufacturer:
Zilog
Quantity:
363
PS026308-1207
Internal RESET
System Clock
Note: Not to Scale
WDT Clock
VDD = 3.3 V
signal
Watchdog Timer Reset
External Reset Input
V
V
POR
VBO
If the device is in NORMAL or STOP mode, the WDT initiates a system reset at time-out
if the WDT_RES Flash option bit is programmed to 1. This is the unprogrammed state of
the WDT_RES Flash option bit. If the bit is programmed to 0, it configures the WDT to
cause an interrupt, not a system reset, at time-out. The WDT status bit in the reset status
(RSTSTAT) register is set to 1to signify that the reset was initiated by the WDT.
The RESET pin has a schmitt-triggered input and an internal pull-up resistor. Once the
RESET pin is asserted for a minimum of four system clock cycles, the device progresses
through the system reset sequence. Because of the possible asynchronicity of the system
clock and reset signals, the required reset duration may be three or four clock periods. A
reset pulse of three clock cycles in duration might trigger a reset and a reset pulse of four
cycles in duration always triggers a reset.
While the RESET input pin is asserted low, the Z8 Encore! F083A Series devices remain
in the Reset state. If the RESET pin is held low beyond the system reset time-out, the
Execution
Program
Figure 7. Voltage Brown-Out Reset Operation
Brownout
Voltage
counter delay
POR
Z8 Encore!
Reset and Stop Mode Recovery
Product Specification
Execution
Program
®
F083A Series
VDD = 3.3 V
27

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