PIC16F628A-I/ML Microchip Technology, PIC16F628A-I/ML Datasheet - Page 103

• Manufacturer Part Number: PIC16F628A-I/ML
• Description: IC MCU FLASH 2KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 224Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Data Converters: -
• Lead Free Status / Rohs Status: Details

14.4
14.4.1
The on-chip POR holds the part in Reset until a V
rise is detected (in the range of 1.2-1.7V). A maxi-
mum rise time for V
“Electrical Specifications” for details.
The POR circuit does not produce an internal Reset
when V
When the device starts normal operation (exits the
Reset
(voltage, frequency, temperature, etc.) must be met to
ensure proper operation. If these conditions are not
met, the device must be held in Reset via MCLR, BOR
or PWRT until the operating conditions are met.
For additional information, refer to Application Note
AN607 “Power-up Trouble Shooting” (DS00607).
14.4.2
The PWRT provides a fixed 72 ms (nominal) time out
on power-up (POR) or if enabled from a Brown-out
Reset. The PWRT operates on an internal RC oscilla-
tor. The chip is kept in Reset as long as PWRT is active.
The PWRT delay allows the V
able level. A configuration bit, PWRTE can disable (if
set) or enable (if cleared or programmed) the PWRT. It
is recommended that the PWRT be enabled when
Brown-out Reset is enabled.
The power-up time delay will vary from chip-to-chip and
due to V
DC parameters Table 17-7 for details.
FIGURE 14-7:
© 2009 Microchip Technology Inc.
DD
condition),
Power-on Reset (POR), Power-up
Timer (PWRT), Oscillator Start-up
Timer (OST) and Brown-out Reset
(BOR)
DD
declines.
, temperature and process variation. See
POWER-ON RESET (POR)
POWER-UP TIMER (PWRT)
Internal
Internal
Internal
Note:
Reset
Reset
Reset
V
V
V
DD
DD
DD
DD
device
BROWN-OUT SITUATIONS WITH PWRT ENABLED
is required. See Section 17.0
72 ms delay only if PWRTE bit is programmed to ‘0’.
DD
operating
to rise to an accept-
≥ T
parameters
BOR
DD
<72 ms
PIC16F627A/628A/648A
72 ms
14.4.3
The OST provides a 1024 oscillator cycle (from OSC1
input) delay after the PWRT delay is over. Program
execution will not start until the OST time out is
complete. This ensures that the crystal oscillator or
resonator has started and stabilized.
The OST time out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
Sleep. See Table 17-7.
14.4.4
The PIC16F627A/628A/648A have on-chip BOR
circuitry. A configuration bit, BOREN, can disable (if
clear/programmed) or enable (if set) the BOR circuitry.
If V
brown-out situation will reset the chip. A Reset is not
assured if V
V
Table 17-7, respectively.
On any Reset (Power-on, Brown-out, Watchdog, etc.),
the chip will remain in Reset until V
V
be invoked, if enabled, and will keep the chip in Reset
an additional 72 ms.
If V
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once V
rises above V
72 ms Reset. Figure 14-7 shows typical brown-out
situations.
BOR
BOR
72 ms
72 ms
DD
DD
(see Figure 14-7). The Power-up Timer will now
drops below V
and T
falls below V
OSCILLATOR START-UP TIMER
(OST)
BROWN-OUT RESET (BOR)
DD
BOR
BOR
falls below V
, the Power-Up Timer will execute a
are defined in Table 17-2 and
BOR
BOR
while the Power-up Timer is
for longer than T
BOR
V
V
V
BOR
BOR
BOR
for shorter than T
DS40044G-page 103
DD
rises above
BOR
, the
BOR
DD
.