PIC16F628A-I/ML Microchip Technology, PIC16F628A-I/ML Datasheet - Page 21

• Manufacturer Part Number: PIC16F628A-I/ML
• Description: IC MCU FLASH 2KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 224Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Data Converters: -
• Lead Free Status / Rohs Status: Details

TABLE 4-4:
© 2009 Microchip Technology Inc.
Bank 1
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend:
Note
Address
1:
INDF
OPTION
PCL
STATUS
FSR
TRISA
TRISB
PCLATH
INTCON
PIE1
PCON
PR2
TXSTA
SPBRG
EEDATA
EEADR
EECON1
EECON2
VRCON
- = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
For the initialization condition for registers tables, refer to Table 14-6 and Table 14-7.
Name
—
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—
—
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SPECIAL FUNCTION REGISTERS SUMMARY BANK1
Addressing this location uses contents of FSR to address data memory (not a physical
register)
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Timer2 Period Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Baud Rate Generator Register
EEPROM Data Register
EEPROM Address Register
EEPROM Control Register 2 (not a physical register)
Unimplemented
TRISA7
TRISB7
RBPU
CSRC
VREN
EEIE
Bit 7
GIE
IRP
—
—
—
INTEDG
TRISA6
TRISB6
VROE
CMIE
Bit 6
PEIE
RP1
TX9
—
—
—
TRISA5
TRISB5
T0CS
TXEN
RCIE
Bit 5
T0IE
VRR
RP0
—
—
—
Write Buffer for upper 5 bits of Program Counter
TRISA4
TRISB4
SYNC
T0SE
INTE
TXIE
Bit 4
TO
—
—
—
PIC16F627A/628A/648A
WRERR
TRISA3
TRISB3
OSCF
RBIE
Bit 3
PSA
VR3
PD
—
—
TRISA2
TRISB2
CCP1IE
WREN
BRGH
Bit 2
T0IF
PS2
VR2
—
Z
TMR2IE
TRISA1
TRISB1
TRMT
INTF
Bit 1
POR
PS1
VR1
WR
DC
TMR1IE
TRISA0
TRISB0
TX9D
Bit 0
RBIF
BOR
PS0
VR0
RD
C
xxxx xxxx
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
1111 1111
1111 1111
---0 0000
0000 000x
0000 -000
---- 1-0x
1111 1111
0000 -010
0000 0000
xxxx xxxx
xxxx xxxx
---- x000
---- ----
000- 0000
Value on
Reset
DS40044G-page 21
POR
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Details
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