PIC16F628A-I/ML Microchip Technology, PIC16F628A-I/ML Datasheet - Page 98

• Manufacturer Part Number: PIC16F628A-I/ML
• Description: IC MCU FLASH 2KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 224Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Data Converters: -
• Lead Free Status / Rohs Status: Details

PIC16F627A/628A/648A
REGISTER 14-1:
DS40044G-page 98
bit 13
bit 13:
bit 12-9:
bit 8:
bit 7:
bit 6:
bit 5:
bit 3:
bit 2:
bit 4, 1-0:
CP
—
CP: Flash Program Memory Code Protection bit
(PIC16F648A)
(PIC16F628A)
(PIC16F627A)
Unimplemented: Read as ‘0’
CPD: Data Code Protection bit
1 = Data memory code protection off
0 = Data memory code-protected
LVP: Low-Voltage Programming Enable bit
1 = RB4/PGM pin has PGM function, low-voltage programming enabled
0 = RB4/PGM is digital I/O, HV on MCLR must be used for programming
BOREN: Brown-out Reset Enable bit
1 = BOR Reset enabled
0 = BOR Reset disabled
MCLRE: RA5/MCLR/V
1 = RA5/MCLR/V
0 = RA5/MCLR/V
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC<2:0>: Oscillator Selection bits
111 = RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN
110 = RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN
101 = INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
100 = INTOSC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
011 = EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN
010 = HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN
001 = XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN
000 = LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN
Note
Legend:
R = Readable bit
-n = Value at POR
1 = Code protection off
0 = 0000h to 0FFFh code-protected
1 = Code protection off
0 = 0000h to 07FFh code-protected
1 = Code protection off
0 = 0000h to 03FFh code-protected
1:
2:
3:
4:
—
CONFIG – CONFIGURATION WORD REGISTER
Enabling Brown-out Reset does not automatically enable the Power-up Timer (PWRT) the way it does on the
PIC16F627/628 devices.
The code protection scheme has changed from the code protection scheme used on the PIC16F627/628 devices. The
entire Flash program memory needs to be bulk erased to set the CP bit, turning the code protection off. See
“PIC16F627A/628A/648A EEPROM Memory Programming Specification” (DS41196) for details.
The entire data EEPROM needs to be bulk erased to set the CPD bit, turning the code protection off. See “PIC16F627A/
628A/648A EEPROM Memory Programming Specification” (DS41196) for details.
When MCLR is asserted in INTOSC mode, the internal clock oscillator is disabled.
PP
PP
pin function is MCLR
pin function is digital Input, MCLR internally tied to V
—
PP
Pin Function Select bit
W = Writable bit
‘1’ = bit is set
(3)
—
(1)
(4)
(1)
CPD
(2)
LVP
BOREN
U = Unimplemented bit, read as ‘0’
‘0’ = bit is cleared
MCLRE
DD
FOSC2
PWRTE
© 2009 Microchip Technology Inc.
x = bit is unknown
WDTE
F0SC1
F0SC0
bit 0