PIC16F628A-I/ML Microchip Technology, PIC16F628A-I/ML Datasheet - Page 125

• Manufacturer Part Number: PIC16F628A-I/ML
• Description: IC MCU FLASH 2KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 224Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Data Converters: -
• Lead Free Status / Rohs Status: Details

© 2009 Microchip Technology Inc.
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
(W) .OR. (f) → (dest)
Inclusive OR Literal with W
[ label ]
0 ≤ k ≤ 255
(W) .OR. k → (W)
Z
11
The contents of the W register is
OR’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
1
1
IORLW
Before Instruction
After Instruction
Inclusive OR W with f
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
Z
00
Inclusive OR the W register with
register ‘f’. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’
is ‘1’, the result is placed back in
register ‘f’.
1
1
IORWF
Before Instruction
After Instruction
REG1 = 0x13
W
REG1 = 0x13
W
Z
W = 0x9A
W = 0xBF
Z = 0
1000
0x35
0100
REG1, 0
IORLW k
IORWF
= 0x91
= 0x93
= 1
kkkk
dfff
f,d
kkkk
ffff
PIC16F627A/628A/648A
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Move Literal to W
[ label ]
0 ≤ k ≤ 255
k → (W)
None
11
The eight bit literal ‘k’ is loaded
into W register. The “don’t
cares” will assemble as ‘0’s.
1
1
MOVLW
After Instruction
Move f
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
(f) → (dest)
Z
00
The contents of register ‘f’ is
moved to a destination
dependent upon the status of
‘d’. If d = 0, destination is W
register. If d = 1, the destination
is file register f itself. d = 1 is
useful to test a file register since
status flag Z is affected.
1
1
MOVF
After Instruction
W= value in REG1 register
Z = 1
W = 0x5A
00xx
0x5A
1000
REG1, 0
MOVLW k
MOVF f,d
DS40044G-page 125
kkkk
dfff
kkkk
ffff