PIC16F628A-I/ML Microchip Technology, PIC16F628A-I/ML Datasheet - Page 58

• Manufacturer Part Number: PIC16F628A-I/ML
• Description: IC MCU FLASH 2KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 224Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Data Converters: -
• Lead Free Status / Rohs Status: Details

PIC16F627A/628A/648A
9.1
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin RB3/CCP1. An event is defined as:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
An event is selected by control bits CCP1M<3:0>
(CCP1CON<3:0>). When a capture is made, the
interrupt request flag bit CCP1IF (PIR1<2>) is set. It
must be cleared in software. If another capture occurs
before the value in register CCPR1 is read, the old
captured value will be lost.
9.1.1
In Capture mode, the RB3/CCP1 pin should be config-
ured as an input by setting the TRISB<3> bit.
FIGURE 9-1:
9.1.2
Timer1 must be running in Timer mode or Synchro-
nized Counter mode for the CCP module to use the
capture feature. In Asynchronous Counter mode, the
capture operation may not work.
9.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit CCP1IF following any such
change in Operating mode.
DS40044G-page 58
RB3/CCP1
pin
Note:
Capture Mode
edge detect
CCP PIN CONFIGURATION
If the RB3/CCP1 is configured as an
output, a write to the port can cause a
capture condition.
Q’s
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT
Prescaler
³ 1, 4, 16
and
CCP1CON<3:0>
Set flag bit CCP1IF
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
(PIR1<2>)
Capture
Enable
CCPR1H
TMR1H
CCPR1L
TMR1L
prescalers. This example also clears the prescaler
9.1.4
There are four prescaler settings, specified by bits
CCP1M<3:0>. Whenever the CCP module is turned
off, or the CCP module is not in Capture mode, the
prescaler counter is cleared. This means that any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will not
be cleared, therefore the first capture may be from a
non-zero
recommended method for switching between capture
counter and will not generate the “false” interrupt.
EXAMPLE 9-1:
9.2
In Compare mode, the 16-bit CCPR1 register value is
constantly compared against the TMR1 register pair
value. When a match occurs, the RB3/CCP1 pin is:
• Driven high
• Driven low
• Remains unchanged
The action on the pin is based on the value of control
bits CCP1M<3:0> (CCP1CON<3:0>). At the same
time, interrupt flag bit CCP1IF is set.
FIGURE 9-2:
RB3/CCP1
pin
CLRF
MOVLW
MOVWF
Note:
Output Enable
TRISB<3>
Compare Mode
CCP1CON
NEW_CAPT_PS ;Load the W reg with
CCP1CON
CCP PRESCALER
prescaler.
Special event trigger will reset Timer1, but not
set interrupt flag bit TMR1IF (PIR1<0>).
Q
R
S
CCP1CON<3:0>
Mode Select
Output
Logic
CHANGING BETWEEN
CAPTURE PRESCALERS
COMPARE MODE
OPERATION BLOCK
DIAGRAM
;Turn CCP module off
; the new prescaler
; mode value and CCP ON
;Load CCP1CON with this
; value
© 2009 Microchip Technology Inc.
Example 9-1
(PIR1<2>)
Set flag bit CCP1IF
match
CCPR1H CCPR1L
TMR1H
Comparator
shows
TMR1L
the