PIC16F628A-I/ML Microchip Technology, PIC16F628A-I/ML Datasheet - Page 33

• Manufacturer Part Number: PIC16F628A-I/ML
• Description: IC MCU FLASH 2KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 224Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Data Converters: -
• Lead Free Status / Rohs Status: Details

5.0
The PIC16F627A/628A/648A have two ports, PORTA
and PORTB. Some pins for these I/O ports are
multiplexed with alternate functions for the peripheral
features on the device. In general, when a peripheral is
enabled, that pin may not be used as a general
purpose I/O pin.
5.1
PORTA is an 8-bit wide latch. RA4 is a Schmitt Trigger
input and an open drain output. Port RA4 is multiplexed
with the T0CKI clock input. RA5
input only and has no output drivers. All other RA port
pins have Schmitt Trigger input levels and full CMOS
output drivers. All pins have data direction bits (TRIS
registers) which can configure these pins as input or
output.
A ‘1’ in the TRISA register puts the corresponding
output driver in a High-impedance mode. A ‘0’ in the
TRISA register puts the contents of the output latch on
the selected pin(s).
Reading the PORTA register reads the status of the
pins whereas writing to it will write to the port latch. All
write operations are read-modify-write operations. So a
write to a port implies that the port pins are first read,
then this value is modified and written to the port data
latch.
The PORTA pins are multiplexed with comparator and
voltage reference functions. The operation of these
pins are selected by control bits in the CMCON
(Comparator Control register) register and the VRCON
(Voltage Reference Control register) register. When
selected as a comparator input, these pins will read
as ‘0’s.
TRISA controls the direction of the RA pins, even when
they are being used as comparator inputs. The user
must make sure to keep the pins configured as inputs
when using them as comparator inputs.
The RA2 pin will also function as the output for the
voltage reference. When in this mode, the V
very high-impedance output. The user must configure
TRISA<2> bit as an input and use high-impedance
loads.
© 2009 Microchip Technology Inc.
Note 1: RA5 shares function with V
2: On Reset, the TRISA register is set to all
3: TRISA<6:7> is overridden by oscillator
I/O PORTS
PORTA and TRISA Registers
voltage levels are applied to RA5, the
device will enter Programming mode.
inputs. The digital inputs (RA<3:0>) are
disabled and the comparator inputs are
forced to ground to reduce current
consumption.
configuration. When PORTA<6:7> is
overridden, the data reads ‘0’ and the
TRISA<6:7> bits are ignored.
(1)
is a Schmitt Trigger
PP
. When V
REF
pin is a
PP
PIC16F627A/628A/648A
In one of the comparator modes defined by the
CMCON register, pins RA3 and RA4 become outputs
of the comparators. The TRISA<4:3> bits must be
cleared to enable outputs to use this function.
EXAMPLE 5-1:
FIGURE 5-1:
CLRF
MOVLW
MOVWF
BCF
BSF
MOVLW
MOVWF
Data
Bus
WR
PORTA
WR
TRISA
RD
TRISA
RD PORTA
To Comparator
PORTA
0x07
CMCON
STATUS, RP1
STATUS, RP0 ;Select Bank1
0x1F
TRISA
D
D
TRIS Latch
Data Latch
CK
CK
Q
Q
Q
Q
INITIALIZING PORTA
BLOCK DIAGRAM OF
RA0/AN0:RA1/AN1 PINS
;Initialize PORTA by
;setting
;output data latches
;Turn comparators off and
;enable pins for I/O
;functions
;Value used to initialize
;data direction
;Set RA<4:0> as inputs
;TRISA<5> always
;read as ‘1’.
;TRISA<7:6>
;depend on oscillator
;mode
(CMCON Reg.)
Input Mode
Schmitt Trigger
Analog
Input Buffer
Q
EN
DS40044G-page 33
D
V
V
DD
SS
I/O Pin