PIC16F628A-I/ML Microchip Technology, PIC16F628A-I/ML Datasheet - Page 61

IC MCU FLASH 2KX14 EEPROM 28QFN

PIC16F628A-I/ML

Manufacturer Part Number
PIC16F628A-I/ML
Description
IC MCU FLASH 2KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16F628A-I/ML

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
224Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Data Converters
-
Lead Free Status / Rohs Status
 Details
9.3.2
The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available: the CCPR1L contains
the eight MSbs and the CCP1CON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPR1L:CCP1CON<5:4>. The following equation is
used to calculate the PWM duty cycle in time:
CCPR1L and CCP1CON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPR1H until after a match between PR2 and TMR2
occurs (i.e., the period is complete). In PWM mode,
CCPR1H is a read-only register.
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
When the CCPR1H and 2-bit latch match TMR2
concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCP1 pin is cleared.
TABLE 9-3:
TABLE 9-4:
© 2009 Microchip Technology Inc.
0Bh, 8Bh,
10Bh, 18Bh
0Ch
8Ch
86h, 186h
11h
92h
12h
15h
16h
17h
Legend:
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Address
PWM duty cycle =
(CCPR1L:CCP1CON<5:4>) Tosc TMR2 prescale
INTCON
PIR1
PIE1
TRISB
TMR2
PR2
T2CON
CCPR1L
CCPR1H
CCP1CON
PWM DUTY CYCLE
x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used by PWM and Timer2.
Name
PWM Frequency
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz
REGISTERS ASSOCIATED WITH PWM AND TIMER2
Capture/Compare/PWM Register 1 (MSB)
Timer2 Module’s Register
Timer2 Module’s Period Register
Capture/Compare/PWM Register 1 (LSB)
TRISB7
Bit 7
EEIF
EEIE
GIE
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
TRISB6
CMIE
CMIF
Bit 6
PEIE
TRISB5
CCP1X
RCIE
RCIF
Bit 5
T0IE
value
1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz
0xFF
TRISB4
CCP1Y
16
10
Bit 4
INTE
TXIF
TXIE
PIC16F627A/628A/648A
CCP1M3
TRISB3
0xFF
RBIE
Bit 3
10
4
Maximum PWM resolution (bits) for a given PWM
frequency:
For an example PWM period and duty cycle
calculation, see the PIC
ual (DS33023).
9.3.3
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
Note:
PWM
Resolution
TMR2ON T2CKPS1 T2CKPS0 -000 0000
Set the PWM period by writing to the PR2
register.
Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
TRISB<3> bit.
Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
CCP1M2
CCP1IF
CCP1IE
TRISB2
Bit 2
T0IF
0xFF
10
1
If the PWM duty cycle value is longer than
the PWM period the CCP1 pin will not be
cleared.
SET-UP FOR PWM OPERATION
CCP1M1 CCP1M0
TMR2IE
TMR2IF
TRISB1
=
INTF
Bit 1
log
-------------------------------------------------------------------------- - bits
0x3F
-------------------------------------------------------------
F
PWM
1
8
TMR1IF
TMR1IE
TRISB0
®
RBIF
Bit 0
Mid-Range Reference Man-
×
log(2)
TMR2 Prescaler
Fosc
0000 000x
0000 -000
0000 -000
1111 1111
0000 0000
1111 1111
xxxx xxxx
xxxx xxxx
--00 0000
0x1F
Value on
POR
1
7
DS40044G-page 61
0000 000u
0000 -000
0000 -000
1111 1111
0000 0000
1111 1111
uuuu uuuu
uuuu uuuu
uuuu uuuu
--00 0000
Value on
all other
0x17
Resets
6.5
1

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