AT91SAM9260B-CU-999 Atmel, AT91SAM9260B-CU-999 Datasheet - Page 781

• Manufacturer Part Number: AT91SAM9260B-CU-999
• Description: IC MCU ARM9 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9260B-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9260-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM9260-EK - KIT EVAL FOR AT91SAM9260AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6221I–ATARM–17-Jul-09
Revision
6221G
Revision
6221F
Comments
”AT91SAM9260
”Power
restraints removed.
Section 40.2 ”DC
UHP,
Connection”, figure and text updated to correspond to on-chip connection.
Comments
Updated all references to 217-ball LFBGA to Green package.
In
voltage during startup.
In
In
In
ignored.”
Changed divider value for Master Clock Controller in
Controller Block Diagram” on page
In
In
In
page
In
“User Area Address,” on page
Boot Program: Updated Note below
SDRAMC: Updated CAS bit description on
Register”.
Updated MODE bit description in
TWI: Inserted EOSACC bit description in
421.
Section 10.4.6 “Multimedia Card Interface” on page
Section 5.1 “Power Supplies” on page
Section 6.5 “I/O Line Drive Levels” on page
Section 6.7 “Slow Clock Selection” on page
Section 7.1.1 “Boot Strategies” on page
Table 9-4, “Multiplexing on PIO Controller C,” on page
Section 13. “AT91SAM9260 Boot Program” on page 79
Section 13.6 ”SAM-BA Boot” on page
Section 37.3 ”Block
Considerations”, in
87, updated information on NAND Flash boot program execution.
Errata”, added
Characteristics”, V
Diagram”, removed warning on pull-down connection
Section 5.1 ”Power
”AT91SAM9260 Errata - Revision “B” Parts”
90.
Section 21.6.1 “SDRAMC Mode Register” on page
OL
23.
Table 13-4, “Input Frequencies Supported,” on page
and V
86, added information on internal SRAM with
13, VDDCORE and VDDBU, added information on supply
Section 30.11.7 “TWI Interrupt Enable Register” on page
OH
17, removed sentence “When REMAP = 1, BMS is
page 219
Supplies”, VDDCORE and VDDBU startup voltage
conditions updated in
15, added information on PC4 to PC31.
15, corrected startup delay for internal RC oscillator.
Figure 8-2, ”AT91SAM9260 Power Management
in
38, corrected specification version compatibility.
Section 21.6.3 ”SDRAMC Configuration
29, removed comment for PC13.
and
Section 13.5 “NAND Flash Boot” on
Table 40-2
Section 37.6 ”Typical
216.
AT91SAM9260
Table 13-11,
80.
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