AT91SAM9260B-CU-999 Atmel, AT91SAM9260B-CU-999 Datasheet - Page 785

• Manufacturer Part Number: AT91SAM9260B-CU-999
• Description: IC MCU ARM9 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9260B-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9260-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM9260-EK - KIT EVAL FOR AT91SAM9260AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6221I–ATARM–17-Jul-09
Revision
6221D
Comments
Updated information on programmable pull-up resistor in
Updated
In
corrected Peripheral Name for PID12, PID13 and PID14.
Placed comment on RDY/BUSY with PC13 in
page
Boot Program: Added
Corrected code in
Section 13.4.2 ”Structure of ARM Vector 6” on page
Updated DataFlash support for Boot ROM in
RSTC: In
counter for crystal oscillator.
EBI: Corrected number of CS to 7 in
Lines Description,” on page
page 139
Added note
SMC: Added information on boot in
SDRAMC: Change to
note
ECC:
Section 23.3.1 ”Write Access”
Section 23.4.4 ”ECC Parity Register”, on page 243
page 243
PMC: Updated
Figure 25-3 ”Typical Crystal Connection” on page
Updated
Updated information on enable/disable in
PIO:
Section 28.4.5 “Synchronous Data Output” on page
Section 28.6 “Parallel Input/Output Controller (PIO) User Interface” on page
on PIO_PSR, PIO_ODSR, PIO_PDSR in Register Mapping table.
SSC: Defined max Frame Sync Data length in
TC: Added information on compare register B and waveform generation in
Event/Trigger Conditions” on page
Event Selection” on page 536
Added
Table 9-1, “AT91SAM9260 Peripheral Identifiers,” on page
(1)
Figure 28-3, ”I/O Line Control Logic” on page 334
29.
Section 23.3 ”Functional Description”, on page 235
Figure 33-2, ”Clock Chaining Selection” on page 517
on
Section 6.7 “Slow Clock Selection” on page
Section 25.4.1 ”Main Oscillator Connections”, on page
Section 12.4.1 “Reset Controller Overview” on page 65
and
Instruction updated.
page
(3)
to
Table 19-4, “EBI Pins and External Device Connections,” on page
Figure 25-1 ”Typical Slow Clock Crystal Oscillator Connection” on page 257
214.
Table 19-4, “EBI Pins and External Device Connections,” on page
Section 13.4 ”DataFlash Boot” on page
Step 5
Figure 13-2, ”Clocks and DBGU Configurations” on page
137,
in
in
and
Section 22.4.1 ”SDRAM Device Initialization” on page
“TC Channel Mode Register: Waveform Mode”
Table 19-3, “EBI Pins and External Static Devices Connections,” on
Section 23.3.2 ”Read Access”, on page 236
528. Added Note
Section 20.7.2.1 “Byte Write Access” on page
Section 19.1 “Description” on page
Section 26.3 ”Processor Clock Controller”, on page
Table 13-5, “DataFlash Device,” on page 84
Table 9-4, “Multiplexing on PIO Controller C,” on
Section 33.6.5.1 ”Frame Sync Data” on page
258.
and
336, PIO_OWSR typo corrected.
84.
(1)
15.
change to I/O Line Control Logic.
to Register Bit
Section 23.4.5 ”ECC NParity Register”, on
Section 6.4 “PIO Controllers” on page
updated.
83. Corrected valid vectors example in
to demonstrate clock chaining.
24, added Note on clocking and
258.
added information on startup
Description“EEVT: External
135,
Section 33.6.12 “External
340, footnotes updated
Table 19-1, “EBI I/O
updated.
81.
to further clarify.
140.
165.
140.
214; addition of
AT91SAM9260
and
502.
263.
15.
Change
Request
Ref.
3972
3504 and
3543
3406
3455
3453
4184
3005
3456
3893
3252
3305
3970
3861
3832
3835
3053
3289
3974
2704
3342
785