P89LPC972FDH,129 NXP Semiconductors, P89LPC972FDH,129 Datasheet - Page 17

• Manufacturer Part Number: P89LPC972FDH,129
• Description: MCU 80C51 8KB FLASH 20TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC972FDH,129

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 20-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 5
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935290299129

Table 4.
* indicates SFRs that are bit addressable.
[1]
[2]
[3]
[4]
[5]
[6]
Name
TH4
TL4
TINTF
TRIM
WDCON
WDL
WFEED1 Watchdog
WFEED2 Watchdog
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
All ports are in input only (high-impedance) state after power-up.
The RSTSRC register reflects the cause of the P89LPC970/971/972 reset except BOIF bit. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the
power-on reset value is x011 0000.
The only reset sources that affect these SFRs are power-on reset and watchdog reset.
On power-on reset and watchdog reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.
Other resets will not affect WDTOF.
Description
Timer/Counter 4
high byte
Timer/Counter 4
low byte
Timer/Counters
2/3/4 overflow
and external
flags
Internal
oscillator trim
register
Watchdog
control register
Watchdog load
feed 1
feed 2
Special function registers
SFR
addr.
CCH
CBH
CEH
C1H
C2H
C3H
96H
A7H
…continued
Bit functions and addresses
RCCLK
PRE2
MSB
-
ENCLK
PRE1
-
TRIM.5
PRE0
TF4
TRIM.4
EXF4
-
TRIM.3
TF3
-
WDRUN
TRIM.2
EXF3
WDTOF
TRIM.1
TF2
WDCLK
TRIM.0
EXF2
LSB
Reset value
Hex
00
00
00
[4][5]
[4][6]
FF
Binary
0000 000
0
0000 0000
0000 000
0
1111 1111