P89LPC972FDH,129 NXP Semiconductors, P89LPC972FDH,129 Datasheet - Page 44

MCU 80C51 8KB FLASH 20TSSOP

P89LPC972FDH,129

Manufacturer Part Number
P89LPC972FDH,129
Description
MCU 80C51 8KB FLASH 20TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet

Specifications of P89LPC972FDH,129

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
20-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
15
Number Of Timers
5
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935290299129
NXP Semiconductors
P89LPC97X
Product data sheet
7.29.10 Hardware activation of the bootloader
7.30 User configuration bytes
7.31 User sector security bytes
Remark: Users who wish to use this loader should take precautions to avoid erasing the
1 kB sector that contains this bootloader. Instead, the page erase function can be used to
erase the first eight 64-byte pages located in this sector.
A custom bootloader can be written with the Boot Vector set to the custom bootloader, if
desired.
Table 9.
The bootloader can also be executed by forcing the device into ISP mode during a
power-on sequence (see the P89LPC970/971/972 User manual for specific information).
This has the same effect as having a non-zero status byte. This allows an application to
be built that will normally execute user code but can be manually forced into ISP
operation. If the factory default setting for the boot is changed, it will no longer point to the
factory pre-programmed ISP bootloader code. After programming the flash, the status
byte should be programmed to zero in order to allow execution of the user’s application
code beginning at address 0000H.
Some user-configurable features of the P89LPC970/971/972 must be defined at power-up
and therefore cannot be set by the program after start of execution. These features are
configured through the use of the flash byte UCFG1 and UCFG2. Please see the
P89LPC970/971/972 User Manual for additional details.
There are four/eight User Sector Security Bytes on the P89LPC970/971/972. Each byte
corresponds to one sector. Please see the P89LPC970/971/972 User manual for
additional details.
Device
P89LPC970
P89LPC971
P89LPC972
Default boot vector values and ISP entry points
All information provided in this document is subject to legal disclaimers.
Default
boot vector
07H
0FH
1FH
Rev. 3 — 8 June 2010
8-bit microcontroller with accelerated two-clock 80C51 core
Default
bootloader
entry point
0700H
0F00H
1F00H
P89LPC970/971/972
Default bootloader
code range
0600H to 07FFH
0E00H to 1FFFH
1E00H to 1FFFH
© NXP B.V. 2010. All rights reserved.
1 kB sector
range
0400H to 07FFH
0C00H to 0FFFH
1C00H to 1FFFH
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