LPC2939FBD208,551 NXP Semiconductors, LPC2939FBD208,551 Datasheet - Page 30

IC ARM9 MCU FLASH 768KB 208-LQFP

LPC2939FBD208,551

Manufacturer Part Number
LPC2939FBD208,551
Description
IC ARM9 MCU FLASH 768KB 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2900r
Datasheet

Specifications of LPC2939FBD208,551

Core Processor
ARM9
Core Size
32-Bit
Speed
125MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, UART/USART, USB, USB OTG
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
152
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Eeprom Size
16K x 8
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Processor Series
LPC29
Core
ARM968E-S
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
OM11027
Package
208LQFP
Device Core
ARM968E-S
Family Name
LPC2900
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
160
Interface Type
CAN/I2C/LIN/QSPI/UART/USB
On-chip Adc
24-chx10-bit
Number Of Timers
6
For Use With
568-4787 - BOARD EVAL LPC2939
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935287113551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2939FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 14.
LPC2939_3
Product data sheet
Pin name
Port 1
USB_VBUS1
USB_D+1
USB_D1
USB_CONNECT1 O
USB_UP_LED1
USB_SCL1
USB_SDA1
USB_LS1
USB_RST1
USB_INT1
USB_SSPND1
USB_PWRD1
USB_PPWR1
USB_OVRCR1
Port 2
USB_VBUS2
USB_D+2
USB_D2
USB OTG port pins
6.11.3.1 Features
6.11.3 USB host controller
6.11.4 Pin description
Direction
I
I/O
I/O
O
I/O
I/O
O
O
O
O
I
O
I
I
I/O
I/O
The host controller enables full- and low-speed data exchange with USB devices attached
to the bus. It consists of register interface, serial interface engine and DMA controller. The
register interface complies with the OHCI specification.
Fully compliant with On-The-Go supplement to the USB 2.0 Specification, Revision
1.0a
Hardware support for Host Negotiation Protocol (HNP)
Includes a programmable timer required for HNP and Session Request Protocol
(SRP)
Supports any OTG transceiver compliant with the OTG Transceiver Specification
(CEA-2011), Rev. 1.0
OHCI compliant
Two downstream ports
Supports per-port power switching
Description
V
via its corresponding PINSEL register, it is driven
HIGH internally.
positive differential data
negative differential data
SoftConnect control signal
GoodLink LED control signal
I
I
low-speed status (applies to host functionality only)
USB reset status
USB transceiver interrupt
bus suspend status
port power status
port power enable
over-current status
V
via its corresponding PINSEL register, it is driven
HIGH internally.
positive differential data
negative differential data
2
2
BUS
BUS
C serial clock
C serial data
status input. When this function is not enabled
status input. When this function is not enabled
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 7 April 2010
ARM9 microcontroller with CAN, LIN, and USB
Interfacing
-
-
-
-
-
external OTG transceiver
external OTG transceiver
external OTG transceiver
external OTG transceiver
external OTG transceiver
external OTG transceiver
USB host
USB host
USB host
-
-
-
LPC2939
© NXP B.V. 2010. All rights reserved.
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