LPC2939FBD208,551 NXP Semiconductors, LPC2939FBD208,551 Datasheet - Page 51

• Manufacturer Part Number: LPC2939FBD208,551
• Description: IC ARM9 MCU FLASH 768KB 208-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2900r

Specifications of LPC2939FBD208,551

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 125MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, UART/USART, USB, USB OTG
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 152
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16K x 8
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Processor Series: LPC29
• Core: ARM968E-S
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11027
• Package: 208LQFP
• Device Core: ARM968E-S
• Family Name: LPC2900
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 160
• Interface Type: CAN/I2C/LIN/QSPI/UART/USB
• On-chip Adc: 24-chx10-bit
• Number Of Timers: 6
• For Use With: 568-4787 - BOARD EVAL LPC2939
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935287113551

NXP Semiconductors
LPC2939_3
Product data sheet
Fig 11. PCRSS block diagram
AHB2DTL
BRIDGE
6.16.1 Clock description
reset from watchdog counter
OSCILLATOR
LOW POWER
OSCILLATOR
REGISTERS
REGISTERS
EXTERNAL
RST (device pin)
The PCRSS is clocked by a number of different clocks. CLK_SYS_PCRSS clocks the
AHB side of the AHB to DTL bus bridge and CLK_PCR_SLOW clocks the CGU, RGU and
PMU internal logic, see
BASE_SYS_CLK, which can be switched off in low-power modes. CLK_PCR_SLOW is
derived from BASE_PCR_CLK and is always on in order to be able to wake up from
low-power modes.
RING
CGU0
RGU
POR
FDIV[6:0]
PLL
All information provided in this document is subject to legal disclaimers.
RESET OUTPUT
DELAY LOGIC
DEGLITCH/
INPUT
SYNC
Section
Rev. 03 — 7 April 2010
OUT11
OUT6
OUT0
OUT1
OUT5
OUT7
OUT9
CGU0
RGU
6.7.2. CLK_SYS_PCRSS is derived from
ARM9 microcontroller with CAN, LIN, and USB
FDIV
PLL
OUT0
OUT1
OUT2
CGU1
PCR_RST
WARM_RST
RGU_RST
COLD_RST
POR_RST
AHB_RST
SCU_RST
REGISTERS
CONTROL
ENABLE
CLOCK
CLOCK
GATES
PMU
LPC2939
© NXP B.V. 2010. All rights reserved.
PMU
002aae244
wakeup_a
disable:
grant
request
master
branch
clocks
AHB
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