MC56F8014VFAE Freescale Semiconductor, MC56F8014VFAE Datasheet - Page 10

IC DIGITAL SIGNAL CTRLR 32-LQFP

MC56F8014VFAE

Manufacturer Part Number
MC56F8014VFAE
Description
IC DIGITAL SIGNAL CTRLR 32-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8014VFAE

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
2K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
26
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
2(4-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
LQFP
Product
DSCs
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
26
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Rom Size
16 KB
Development Tools By Supplier
MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
Minimum Operating Temperature
- 40 C
For Use With
DEMO56F8014-E - BOARD DEMO MC56F8014 W/UNIV PSDEMO56F8014 - BOARD DEMO MC56F8014 W/US PSAPMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8014-EE - BOARD DEMO FOR 56F8014
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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10
— Signal of over/under limit of ADC sample 2 can be used to drive PWM 4 and 5
Program Control Unit
HWS0
HWS1
FIRA
LA2
LA
Manipulation
PC
JTAG TAP
Enhanced
OnCE™
OMR
LC2
SR
LC
Unit
FISR
Bit-
Figure 1-1 56800E Core Block Diagram
Instruction
Decoder
Interrupt
Looping
Unit
Unit
DSP56800E Core
Y
56F8014 Technical Data, Rev. 11
A2
B2
C2
D2
MAC and ALU
Generation
Address
C1
D1
A1
B1
Y1
Y0
X0
(AGU)
M01
Unit
N3
Multi-Bit Shifter
Arithmetic
Logic Unit
(ALU)
Data
ALU1
A0
B0
C0
D0
R0
R1
N
SP
R2
R3
R4
R5
ALU2
CDBW
CDBR
XDB2
XAB1
XAB2
PAB
PDB
Freescale Semiconductor
Program
Program
Interface
Memory
IPBUS
Data /
RAM

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