MC56F8014VFAE Freescale Semiconductor, MC56F8014VFAE Datasheet - Page 70

IC DIGITAL SIGNAL CTRLR 32-LQFP

MC56F8014VFAE

Manufacturer Part Number
MC56F8014VFAE
Description
IC DIGITAL SIGNAL CTRLR 32-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8014VFAE

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
2K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
26
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
2(4-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
LQFP
Product
DSCs
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
26
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Rom Size
16 KB
Development Tools By Supplier
MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
Minimum Operating Temperature
- 40 C
For Use With
DEMO56F8014-E - BOARD DEMO MC56F8014 W/UNIV PSDEMO56F8014 - BOARD DEMO MC56F8014 W/US PSAPMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8014-EE - BOARD DEMO FOR 56F8014
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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The lower four bits of the GPIO A register can function as GPIO, PWM, or as additional clock output
signals. GPIO has priority and is enabled/disabled via the GPIOA_PEREN. If GPIOA[3:0] are
programmed to operate as peripheral outputs, then the choice between PWM and additional clock outputs
is done here in the CLKOUT. The default state is for the peripheral function of GPIOA[3:0] to be
programmed as PWM. This can be changed by altering PWM3 through PWM0.
6.3.7.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.7.2
6.3.7.3
6.3.7.4
6.3.7.5
6.3.7.6
6.3.7.7
Selects clock to be muxed out on the CLKO pin.
70
Base + $A
RESET
0 = Peripheral output function of GPIOA[3] is defined to be PWM3
1 = Peripheral output function of GPIOA[3] is defined to be the Relaxation Oscillator Clock
0 = Peripheral output function of GPIOA[2] is defined to be PWM2
1 = Peripheral output function of GPIOA[2] is defined to be the system clock
0 = Peripheral output function of GPIOA[1] is defined to be PWM1
1 = Peripheral output function of GPIOA[1] is defined to be two times the rate of the system clock
0 = Peripheral output function of GPIOA[0] is defined to be PWM0
1 = Peripheral output function of GPIOA[0] is defined to be three times the rate of the system clock
0 = CLKOUT output is enabled and will output the signal indicated by CLKOSEL
1 = CLKOUT is 0
00000 = Reserved for factory test—Continuous system clock
01001 = Reserved for factory test—OCCS MSTR OSC clock
01011 = Reserved for factory test—ADC clock
01100 = Reserved for factory test—JTAG TCLK
Read
Write
Reserved—Bits 15–10
PWM3—Bit 9
PWM2—Bit 8
PWM1—Bit 7
PWM0—Bit 6
Clockout Disable (CLKDIS)—Bit 5
Clockout Select (CLKOSEL)—Bits 4–0
15
0
0
14
0
0
Figure 6-8 CLKO Select Register (SIM_CLKOUT)
13
0
0
12
0
0
56F8014 Technical Data, Rev. 11
11
0
0
10
0
0
PWM
9
3
0
PWM
8
2
0
PWM1 PWM0
7
0
6
0
CLK
DIS
5
1
4
0
3
0
Freescale Semiconductor
CLKOSEL
2
0
1
0
0
0

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