MC56F8014VFAE Freescale Semiconductor, MC56F8014VFAE Datasheet - Page 33

• Manufacturer Part Number: MC56F8014VFAE
• Description: IC DIGITAL SIGNAL CTRLR 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8014VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 2K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Cpu Family: 56F8xxx
• Device Core Size: 16b
• Frequency (max): 32MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 26
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 2(4-chx12-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: LQFP
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 26
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Rom Size: 16 KB
• Development Tools By Supplier: MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
• Minimum Operating Temperature: - 40 C
• For Use With: DEMO56F8014-E - BOARD DEMO MC56F8014 W/UNIV PSDEMO56F8014 - BOARD DEMO MC56F8014 W/US PSAPMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8014-EE - BOARD DEMO FOR 56F8014
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

4.6 Peripheral Memory Mapped Registers
On-chip peripheral registers are part of the data memory map on the 56800E series. These locations may
be accessed with the same addressing modes used for ordinary Data memory, except all peripheral
registers should be read/written using word accesses only.
Table 4-6
listed in order of the base address.
Freescale Semiconductor
X:$FF FFFF
X:$FF FFFE
X:$FF FFFD
X:$FF FFFC
X:$FF FFFB - X:$FF FFA1
X:$FF FFA0
X:$FF FF9F
X:$FF FF9E
X:$FF FF9D
X:$FF FF9C
X:$FF FF9B
X:$FF FF9A
X:$FF FF99
X:$FF FF98
X:$FF FF97
X:$FF FF96
X:$FF FF95
X:$FF FF94
X:$FF FF93
X:$FF FF92
X:$FF FF91
X:$FF FF90
X:$FF FF8F
X:$FF FF8E
X:$FF FF8D
X:$FF FF8C
X:$FF FF8B
X:$FF FF8A
X:$FF FF89 - X:$FF FF00
summarizes base addresses for the set of peripherals on the 56F8014 device. Peripherals are
Address
OTX1 / ORX1
OTX / ORX (32 bits)
OTXRXSR
OCLSR
OCR
OSCNTR (24 bits)
OSR
OBASE
OTBCR
OTBPR
OTB (21 - 24 bits/stage) Trace Buffer Register Stages
OBCR (24 bits)
OBAR1 (24 bits)
OBAR2 (32 bits)
OBMSK (32 bits)
OBCNTR
OESCR
Register Acronym
Table 4-5 EOnCE Memory Map
56F8014 Technical Data, Rev. 11
Transmit Register Upper Word
Receive Register Upper Word
Transmit Register
Receive Register
Transmit and Receive Status and Control Register
Core Lock / Unlock Status Register
Reserved
Control Register
Instruction Step Counter
Instruction Step Counter
Status Register
Peripheral Base Address Register
Trace Buffer Control Register
Trace Buffer Pointer Register
Trace Buffer Register Stages
Breakpoint Unit Control Register
Breakpoint Unit Control Register
Breakpoint Unit Address Register 1
Breakpoint Unit Address Register 1
Breakpoint Unit Address Register 2
Breakpoint Unit Address Register 2
Breakpoint Unit Mask Register 2
Breakpoint Unit Mask Register 2
Reserved
EOnCE Breakpoint Unit Counter
Reserved
Reserved
Reserved
External Signal Control Register
Reserved
Register Name
Peripheral Memory Mapped Registers
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