MC56F8014VFAE Freescale Semiconductor, MC56F8014VFAE Datasheet - Page 102

IC DIGITAL SIGNAL CTRLR 32-LQFP

MC56F8014VFAE

Manufacturer Part Number
MC56F8014VFAE
Description
IC DIGITAL SIGNAL CTRLR 32-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8014VFAE

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
2K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
26
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
2(4-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
LQFP
Product
DSCs
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
26
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Rom Size
16 KB
Development Tools By Supplier
MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
Minimum Operating Temperature
- 40 C
For Use With
DEMO56F8014-E - BOARD DEMO MC56F8014 W/UNIV PSDEMO56F8014 - BOARD DEMO MC56F8014 W/US PSAPMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8014-EE - BOARD DEMO FOR 56F8014
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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10.8 Reset, Stop, Wait, Mode Select, and Interrupt Timing
Note: All the address and data buses described here are internal.
102
1. In the formulas, T = clock cycle and T
2. Parameters listed are guaranteed by design.
3. During Power-On Reset, it is possible to use the 56F8014 internal reset stretching circuitry to extend this period to 2^21T.
Minimum RESET Assertion Duration
Minimum GPIO pin Assertion for Interrupt
RESET deassertion to First Address Fetch
Delay from Interrupt Assertion to Fetch of first
instruction (exiting Stop)
(used during Reset and Stop modes), T = 125ns.
GPIO pin
(Input)
Table 10-13 Reset, Stop, Wait, Mode Select, and Interrupt Timing
Characteristic
Figure 10-6 GPIO Interrupt Timing (Negative Edge-Sensitive)
osc
= oscillator clock cycle. For an operating frequency of 32MHz, T = 31.25ns. At 8MHz
3
56F8014 Technical Data, Rev. 11
Symbol
T
t
t
RDA
t
IW
t
RA
IW
IF
96T
Typical Min
OSC
4T
2T
+ 64T
97T
Typical Max
OSC
6T
+ 65T
Freescale Semiconductor
Unit
ns
ns
ns
ns
1,2
See Figure
10-6

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