MC56F8014VFAE Freescale Semiconductor, MC56F8014VFAE Datasheet - Page 5

IC DIGITAL SIGNAL CTRLR 32-LQFP

MC56F8014VFAE

Manufacturer Part Number
MC56F8014VFAE
Description
IC DIGITAL SIGNAL CTRLR 32-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8014VFAE

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
2K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
26
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
2(4-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
LQFP
Product
DSCs
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
26
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Rom Size
16 KB
Development Tools By Supplier
MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
Minimum Operating Temperature
- 40 C
For Use With
DEMO56F8014-E - BOARD DEMO MC56F8014 W/UNIV PSDEMO56F8014 - BOARD DEMO MC56F8014 W/US PSAPMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8014-EE - BOARD DEMO FOR 56F8014
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Part 1: Overview . . . . . . . . . . . . . . . . . . . . . . . 6
Part 2: Signal/Connection Descriptions . . . 14
Part 3: OCCS . . . . . . . . . . . . . . . . . . . . . . . . . 26
Part 4: Memory Map . . . . . . . . . . . . . . . . . . . 29
Part 5: Interrupt Controller (ITCN) . . . . . . . . 43
Part 6: System Integration Module (SIM) . . 62
Freescale Semiconductor
1.1. 56F8014 Features . . . . . . . . . . . . . . . . . . . . 6
1.2. 56F8014 Description. . . . . . . . . . . . . . . . . . . 8
1.3. Award-Winning Development Environment . 8
1.4. Architecture Block Diagram . . . . . . . . . . . . . 9
1.5. Synchronize ADC with PWM . . . . . . . . . . . . 9
1.6. Multiple Frequency PWM Output . . . . . . . . . 9
1.7. Product Documentation . . . . . . . . . . . . . . . 13
1.8. Data Sheet Conventions. . . . . . . . . . . . . . . 13
2.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2. 56F8014 Signal Pins . . . . . . . . . . . . . . . . . 18
3.1. Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.3. Operating Modes . . . . . . . . . . . . . . . . . . . . 26
3.4. Block Diagram . . . . . . . . . . . . . . . . . . . . . . 28
3.5. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . 29
4.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.2. Interrupt Vector Table . . . . . . . . . . . . . . . . . 29
4.3. Program Map . . . . . . . . . . . . . . . . . . . . . . . 31
4.4. Data Map . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.5. EOnCE Memory Map . . . . . . . . . . . . . . . . . 32
4.6. Peripheral Memory Mapped Registers . . . . 33
5.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.3. Functional Description . . . . . . . . . . . . . . . . 43
5.4. Block Diagram . . . . . . . . . . . . . . . . . . . . . . 45
5.5. Register Descriptions . . . . . . . . . . . . . . . . . 45
5.6. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
6.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 62
6.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
6.3. Register Descriptions . . . . . . . . . . . . . . . . . 64
6.4. Clock Generation Overview . . . . . . . . . . . . 77
6.5. Power-Down Modes . . . . . . . . . . . . . . . . . . 77
6.6. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
6.7. Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
6.8. Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . 82
56F8014 Data Sheet Table of Contents
56F8014 Technical Data, Rev. 11
Part 7: Security Features . . . . . . . . . . . . . . .82
Part 8: General Purpose Input/Output (GPIO)
Part 9: Joint Test Action Group (JTAG) . . .91
Part 10: Specifications . . . . . . . . . . . . . . . . .91
Part 11: Packaging . . . . . . . . . . . . . . . . . . .115
Part 12: Design Considerations . . . . . . . . .118
Part 13: Ordering Information . . . . . . . . . .121
Part 14: Appendix . . . . . . . . . . . . . . . . . . . .122
7.1. Operation with Security Enabled . . . . . . . . . 82
7.2. Flash Access Lock and Unlock Mechanisms 83
7.3. Product Analysis. . . . . . . . . . . . . . . . . . . . . . 84
8.1. Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . 84
8.2. Configuration . . . . . . . . . . . . . . . . . . . . . . . . 84
8.3. Reset Values . . . . . . . . . . . . . . . . . . . . . . . . 86
9.1. 56F8014 Information . . . . . . . . . . . . . . . . . . 91
10.1. General Characteristics . . . . . . . . . . . . . . . 91
10.2. DC Electrical Characteristics . . . . . . . . . . . 95
10.3. AC Electrical Characteristics . . . . . . . . . . . 97
10.4. Flash Memory Characteristics . . . . . . . . . . 98
10.5. External Clock Operation Timing . . . . . . . . 99
10.6. Phase Locked Loop Timing . . . . . . . . . . . . 99
10.7. Relaxation Oscillator Timing. . . . . . . . . . . 100
10.8. Reset, Stop, Wait, Mode Select, and
10.9. Serial Peripheral Interface (SPI) Timing . . 102
10.10. Quad Timer Timing. . . . . . . . . . . . . . . . . 105
10.11. Serial Communication Interface (SCI)
10.12. Inter-Integrated Circuit Interface (I2C)
10.13. JTAG Timing. . . . . . . . . . . . . . . . . . . . . . 109
10.14. Analog-to-Digital Converter (ADC)
10.15. Equivalent Circuit for ADC Inputs . . . . . . 112
10.16. Power Consumption . . . . . . . . . . . . . . . . 112
11.1. 56F8014 Package and Pin-Out
12.1. Thermal Design Considerations . . . . . . . . 118
12.2. Electrical Design Considerations . . . . . . . 119
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84
Interrupt Timing . . . . . . . . . . . . . . 101
Timing . . . . . . . . . . . . . . . . . . . . . 107
Timing . . . . . . . . . . . . . . . . . . . . . 108
Parameters . . . . . . . . . . . . . . . . . 111
Information . . . . . . . . . . . . . . . . . . 115
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