MC56F8014VFAE Freescale Semiconductor, MC56F8014VFAE Datasheet - Page 72

IC DIGITAL SIGNAL CTRLR 32-LQFP

MC56F8014VFAE

Manufacturer Part Number
MC56F8014VFAE
Description
IC DIGITAL SIGNAL CTRLR 32-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8014VFAE

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
2K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
26
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
2(4-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
LQFP
Product
DSCs
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
26
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Rom Size
16 KB
Development Tools By Supplier
MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
Minimum Operating Temperature
- 40 C
For Use With
DEMO56F8014-E - BOARD DEMO MC56F8014 W/UNIV PSDEMO56F8014 - BOARD DEMO MC56F8014 W/US PSAPMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8014-EE - BOARD DEMO FOR 56F8014
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Note: This bit should only be changed while the Quad Timer module’s clock is disabled. See
6.3.9.
Note: High-speed clocking is only available when the PLL is being used.
Note: If the PWM sync signal is used as input to Timer 3 (See SIM_CTRL: TC3_INP,
then the clocks of the Quad Timer and PWM must be related, as shown in
6.3.8.2
This bit selects the clock speed for the PWM module.
Note: This bit should only be changed while the
Note: High-speed clocking is only available when the PLL is being used.
Note: If the PWM sync signal is used as input to Timer 3 (See SIM_CTRL: TC3_INP,
then the clocks of the Quad Timer and PWM must be related, as shown in
6.3.8.3
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.8.4
This bit selects the alternate function for GPIOB7.
6.3.8.5
This bit selects the alternate function for GPIOB6.
Note: The PRECS bit in the OCCS Oscillator Control register can enable this pin as the
72
0 = PWM module clock rate equals system clock rate, to a maximum 32 MHz (default)
1 = PWM module clock rate equals three times system clock rate, to a maximum 96 MHz
0 = TXD — SCI Transmit Data (default)
1 = SCL — I
0 = RXD — SCI Receive Data (default)
1 = SDA — I
PWM Clock Rate (PCR)—Bit 14
Reserved—Bits 13–12
Configure GPIOB7 (CFG_B7)—Bit 11
Configure GPIOB6 (CFG_B6)—Bit 10
2
2
Table 6-2 Allowable Quad Timer and PWM Clock Rates
C Serial Clock
C Serial Data
PWM
when Using PWM Reload Pulse
56F8014 Technical Data, Rev. 11
Clock Speed
1X
3X
PWM
module’s clock is disabled. See
OK
NO
1X
Quad Timer
OK
OK
3X
Table
Table
6-2.
6-2.
Freescale Semiconductor
Section
Section
Section
6.3.9.
6.3.1.7),
6.3.1.7),
Section

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