MC56F8014VFAE Freescale Semiconductor, MC56F8014VFAE Datasheet - Page 86

IC DIGITAL SIGNAL CTRLR 32-LQFP

MC56F8014VFAE

Manufacturer Part Number
MC56F8014VFAE
Description
IC DIGITAL SIGNAL CTRLR 32-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8014VFAE

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
2K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
26
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
2(4-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
LQFP
Product
DSCs
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
26
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Rom Size
16 KB
Development Tools By Supplier
MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
Minimum Operating Temperature
- 40 C
For Use With
DEMO56F8014-E - BOARD DEMO MC56F8014 W/UNIV PSDEMO56F8014 - BOARD DEMO MC56F8014 W/US PSAPMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8014-EE - BOARD DEMO FOR 56F8014
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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8.3 Reset Values
Tables
maps and reset values.
86
4-16
GPIO Function
GPIOB6
GPIOB7
GPIOC0
GPIOC1
GPIOC2
GPIOC3
GPIOC4
GPIOC5
GPIOC6
GPIOC7
GPIOD0
GPIOD1
GPIOD2
GPIOD3
through
4-19
Table 8-2 GPIO External Signals Map (Continued)
RXD / SDA / CLKIN
TXD / SCL
ANA0
ANA1
ANA2 / V
ANA3
ANB0
ANB1
ANB2 / V
ANB3
TDI
TDO
TCK
TMS
Peripheral Function
detail registers for the 56F8014; Figures
Pins in shaded rows are not available in 56F8014
REFH
REFL
56F8014 Technical Data, Rev. 11
Package Pin
LQFP
12
29
31
15
30
32
13
11
10
2
4
5
6
7
SIM register SIM_GPS is used to
select between RXD and SDA.
CLKIN functionality is enabled using
the PLL Control Register within the
OCCS block.
Defaults to B6
SIM register SIM_GPS is used to
select between TXD and SCL
Defaults to B7
Defaults to ANA0
Defaults to ANA1
Defaults to ANA2
Defaults to ANA3
Defaults to ANB0
Defaults to ANB1
Defaults to ANB2
Defaults to ANB3
Defaults to TDI
Defaults to TDO
Defaults to TCK
Defaults to TMS
8-1
through
Notes
8-4
Freescale Semiconductor
summarize register

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