MC56F8014VFAE Freescale Semiconductor, MC56F8014VFAE Datasheet - Page 82

• Manufacturer Part Number: MC56F8014VFAE
• Description: IC DIGITAL SIGNAL CTRLR 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8014VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 2K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Cpu Family: 56F8xxx
• Device Core Size: 16b
• Frequency (max): 32MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 26
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 2(4-chx12-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: LQFP
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 26
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Rom Size: 16 KB
• Development Tools By Supplier: MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
• Minimum Operating Temperature: - 40 C
• For Use With: DEMO56F8014-E - BOARD DEMO MC56F8014 W/UNIV PSDEMO56F8014 - BOARD DEMO MC56F8014 W/US PSAPMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8014-EE - BOARD DEMO FOR 56F8014
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

6.8 Interrupts
The SIM generates no interrupts.
Part 7 Security Features
The 56F8014 offers security features intended to prevent unauthorized users from reading the contents of
the flash memory (FM) array. The 56F8014’s flash security consists of several hardware interlocks that
prevent unauthorized users from gaining access to the flash array.
After flash security is set, an authorized user is still able to access on-chip memory if the user purposely
includes a subroutine to read and transfer the contents of internal memory via serial communication
peripherals, as this code would defeat the purpose of security.
7.1 Operation with Security Enabled
After the user has programmed the flash with his application code, the 56F8014 can be secured by
programming a security word ($E70A) into program memory location $00 1FF7. This nonvolatile word
will keep the device secured through reset and through power-down of the device. Refer to the flash
82
SYS_CLK_DIV2
CKGEN_RST
SYS_CLK_x2
SYS_CLK_D
MSTR_OSC
PERIP_RST
CORE_RST
SYS_CLK
RST
Maximum Delay = 64 MSTR_OSC cycles for POR reset extension and 32 MSTR_OSC cycles
Figure 6-16 Timing Relationships of Reset Signal to Clocks
Switch on falling OSC_CLK
96 MSTR_OSC cycles
32 SYS_CLK cycles delay
56F8014 Technical Data, Rev. 11
for combined reset extension
Switch on falling SYS_CLK
Switch on falling SYS_CLK
32 SYS_CLK cycles delay
Freescale Semiconductor