MCHC705JJ7CPE Freescale Semiconductor, MCHC705JJ7CPE Datasheet - Page 4

• Manufacturer Part Number: MCHC705JJ7CPE
• Description: IC MCU 8BIT 224 BYTES RAM 20PDIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MCHC705JJ7CPE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 14
• Program Memory Size: 6KB (6K x 8)
• Program Memory Type: OTP
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: HC705JJ
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SIOP
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 4 Channel
• Package: 20PDIP
• Family Name: HC05
• Maximum Speed: 2.1 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Revision History
The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
4
September,
August,
Date
2001
2005
Revision
Level
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
4.0
4.1
General reformat to bring document up to current publication standards
References to MC68HRC705SJ7 and MC68HRC705SP7 removed
throughout
Figure 7-9. PB4/AN4/TCMP/CMP1 Pin I/O Circuit — Change label of
register $1FF0 from mask option register to COP register
Table 7-2. Port B Pin Functions — PB0–PB4 — Change heading under
Comparator 1 from OPT in MOR to OPT in COPR
12.4 PEPROM Programming — Contact information updated
Figure 13-3. EPROM Security in COP and Security Register (COPR) —
Figure title change
13.4 EPROM Programming — Contact information updated and corrected
reference to COP register from COP to COPR
15.15 SIOP Timing (VDD = 5.0 Vdc) — Value change for clock (SCK) low
time
15.16 SIOP Timing (VDD = 3.0 Vdc) — Value change for clock (SCK) low
time
Section 15. Electrical Specifications — Added Figure 15-1 through Figure
15-10 and Figure 15-12
Updated to meet Freescale identity guidelines.
Description
Freescale Semiconductor
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