MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 635

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12DT256MPVE

Manufacturer Part Number
MC9S12DT256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DT256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
5 V to 2.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
12KB
Cpu Speed
25MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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17.4.2.3
The global memory spaces reserved for the internal resources (RAM, EEPROM, and FLASH) are not
determined by the MMC module. Size of the individual internal resources are however fixed in the design
of the device cannot be changed by the user. Please refer to the Device User Guide for further details.
Figure 17-23
the memory spaces have fixed top addresses.
Freescale Semiconductor
Bit22
Bit22
1
2
3
RAMSIZE is the hexadecimal value of RAM SIZE in bytes
EEPROMSIZE is the hexadecimal value of EEPROM SIZE in bytes
FLASHSIZE is the hexadecimal value of FLASH SIZE in bytes
Internal Resource
and
Implemented Memory Map
EEPROM
Registers
BDMGPR Register [6:0]
Table 17-20
BDMGPR Register [6:0]
FLASH
RAM
Table 17-19. Global Implemented Memory Space
show the memory spaces occupied by the on-chip resources. Please note that
Figure 17-22. BDMGPR Address Mapping
MC9S12XDP512 Data Sheet, Rev. 2.21
$14_0000 minus EEPROMSIZE
$80_0000 minus FLASHSIZE
BDM HARDWARE COMMAND
$10_0000 minus RAMSIZE
BDM FIRMWARE COMMAND
Global Address [22:0]
Global Address [22:0]
Bit16
Bit16
Bottom Address
Bit15
Bit15
$00_0000
1
3
Chapter 17 Memory Mapping Control (S12XMMCV2)
BDM Local Address
2
CPU Local Address
Top Address
$0F_FFFF
$13_FFFF
$7F_FFFF
$00_07FF
Bit0
Bit0
635

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