MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 934

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12DT256MPVE

Manufacturer Part Number
MC9S12DT256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DT256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
5 V to 2.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
12KB
Cpu Speed
25MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 23 DQ256 Port Integration Module (S12XDQ256PIMV2)
This register configures the drive strength of each port S output pin as either full or reduced. If the port is
used as input this bit is ignored.
23.0.5.27 Port S Pull Device Enable Register (PERS)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or
as output in wired-OR (open drain) mode. This bit has no effect if the port is used as push-pull output. Out
of reset a pull-up device is enabled.
23.0.5.28 Port S Polarity Select Register (PPSS)
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
936
RDRS[7:0]
PERS[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
PERS7
PPSS7
Reduced Drive Port S
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Pull Device Enable Port S
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
1
0
7
7
PERS6
PPSS6
Figure 23-29. Port S Pull Device Enable Register (PERS)
1
0
6
6
Figure 23-30. Port S Polarity Select Register (PPSS)
Table 23-28. RDRS Field Descriptions
Table 23-29. PERS Field Descriptions
PERS5
PPSS5
MC9S12XDP512 Data Sheet, Rev. 2.21
1
0
5
5
PERS4
PPSS4
1
0
4
4
Description
Description
PERS3
PPSS3
1
0
3
3
PERS2
PPSS2
1
0
2
2
PERS1
PPSS1
Freescale Semiconductor
1
0
1
1
PERS0
PPSS0
1
0
0
0

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