HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 242

• Manufacturer Part Number: HD6417708SF60
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

by the LMTS bit in RTCSR, the OVF bit in RTCSR is set and RFCR is cleared. RFCR is
initialized to H'0000 by a power-on reset. It is not initialized by a manual reset or in standby
mode, but retains its contents.
Note: The method for writing to RFCR is different from that for general registers to prevent
10.2.13 Cautions on Accessing Refresh Control Related Registers
RFCR, RTCSR, RTCNT, and RTCOR require that a specific code be appended to the data when it
is written to prevent data from being mistakenly overwritten by program overruns or other write
operations (figure 10.5). Perform reads and writes using the following methods:
1. When writing to RFCR, RTCSR, RTCNT, or RTCOR, use only word transfer instructions.
2. When reading from RFCR, RTCSR, RTCNT, or RTCOR, use a 16-bit access. 0 is read from
222
RTCSR, RTCNT,
Byte transfer instructions cannot be used. When writing to RTCNT, RTCSR, or RTCOR, place
B'10100101 in the upper byte and the write data in the lower byte. When writing to RFCR,
place B'101001 in the top 6 bits and the write data in the remaining bits, as shown in figure
10.5.
undefined bits.
Initial value:
Initial value:
inadvertent overwriting. Using a word transfer instruction, place B'101001 in the top 6 bits
of the upper byte, and the write data in the remaining bits. For details, see section 10.2.13,
Cautions on Accessing Refresh Control Related Registers.
Bit name:
Bit name:
RTCOR
RFCR
R/W:
R/W:
Bit:
Bit:
Figure 10.5 Writing to RFCR, RTCSR, RTCNT, and RTCOR
15
15
1
1
R/W
15
—
0
R
7
0
0
0
1
1
R/W
14
—
0
R
6
0
0
0
0
0
R/W
13
—
0
R
5
0
1
1
10
9
0
R/W
12
—
0
R
4
0
1
8
7
R/W
11
—
0
R
3
0
Write data
Write data
R/W
10
—
0
R
2
0
R/W
R/W
9
0
1
0
R/W
R/W
8
0
0
0
0
0