HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 330

IC SUPERH MPU ROMLESS 144LQFP

HD6417708SF60

Manufacturer Part Number
HD6417708SF60
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708SF60

Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417708SF60
Manufacturer:
HITACHI
Quantity:
2 400
Part Number:
HD6417708SF60
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60
Manufacturer:
HIT
Quantity:
1 000
Part Number:
HD6417708SF60
Manufacturer:
HIT
Quantity:
330
Part Number:
HD6417708SF60I
Manufacturer:
ACCMICRO
Quantity:
144
Part Number:
HD6417708SF60V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
11.2.5
The timer counters are 32-bit read/write registers. The TMU has three timer counters, one for each
channel.
TCNT counts down upon input of a clock. The clock input is selected using the TPSC2–TPSC0
bits in the timer control register (TCR).
When a TCNT count-down results in an underflow (H'00000000
flag (UNF) in the timer control register (TCR) of the relevant channel is set. The TCOR value is
simultaneously set in TCNT itself and the count-down continues from that value.
Because the internal bus for the SH7708 Series on-chip supporting modules is 16 bits wide, a time
lag can occur between the time when the upper 16 bits and lower 16 bits are read. Since TCNT
counts sequentially, this time lag can create discrepancies between the data in the upper and lower
halves. To correct the discrepancy, a buffer register is connected to TCNT so that upper and lower
halves are not read separately. The entire 32-bit data in TCNT can thus be read at once.
TCNT is initialized to H'FFFFFFFF by a power-on reset or manual reset. In standby mode, when
the PLL1 multiplication factor is changed in clock mode 0, 1, 2, or 7, or when the MSTP2 bit is
set to 1 in STBCR, TCNT retains its contents when the input clock selected for the channel is an
external clock (TCLK) or the peripheral clock (Pø), and continues operating when the selected
clock is the on-chip RTC output clock (RTCCLK).
TCNT:
310
Initial value:
Initial value:
Initial value:
Bit name:
Bit name:
Bit name:
Timer Counters (TCNT)
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
R/W
R/W
R/W
31
23
15
1
1
1
R/W
R/W
R/W
30
22
14
1
1
1
R/W
R/W
R/W
29
21
13
1
1
1
R/W
R/W
R/W
28
20
12
1
1
1
R/W
R/W
R/W
27
19
11
1
1
1
H'FFFFFFFF), the underflow
R/W
R/W
R/W
26
18
10
1
1
1
R/W
R/W
R/W
25
17
1
1
9
1
R/W
R/W
R/W
24
16
1
1
8
1

Related parts for HD6417708SF60