HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 411

• Manufacturer Part Number: HD6417708SF60
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

In receiving, the SCI operates as follows:
1. The SCI synchronizes with serial clock input or output and initializes internally.
2. Receive data is shifted into SCRSR in order from the LSB to the MSB. After receiving the
3. After setting RDRF to 1, if the receive-data-full interrupt enable bit (RIE) is set to 1 in SCSCR,
Figure 13.19 shows an example of the SCI receive operation.
data, the SCI checks that RDRF is 0 so that receive data can be loaded from SCRSR into
SCRDR. If this check is passed, the SCI sets RDRF to 1 and stores the received data in
SCRDR. If the check is not passed (receive error), the SCI operates as indicated in table 13.12.
This state prevents further transmission or reception. While receiving, the RDRF bit is not set
to 1. Be sure to clear the error flag.
the SCI requests a receive-data-full interrupt (RXI). If the ORER bit is set to 1 and the receive-
data-full interrupt enable bit (RIE) in SCSCR is also set to 1, the SCI requests a receive-error
interrupt (ERI).
Serial clock
ORER
RDRF
Serial
data
RXI interrupt
request
Transfer direction
Figure 13.19 Example of SCI Receive Operation
Bit 7
RXI interrupt handler
Bit 0
reads data and
clears RDRF
1 frame
bit to 0
Bit 7
RXI interrupt
Bit 0
request
Bit 1
request generated
by overrun error
ERI interrupt
Bit 6
Bit 7
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