HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 450

IC SUPERH MPU ROMLESS 144LQFP

HD6417708SF60

Manufacturer Part Number
HD6417708SF60
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708SF60

Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

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Bit 1—Serial Port Break I/O (SPB0IO): Specifies the serial port TxD pin output condition. When
the TxD pin is actually set as a port output pin and outputs the value set by the SPB0DT bit, the
TE bit in SCSCR should be cleared to 0.
Bit 1: SPB0IO
0
1
Bit 0–Serial Port Break Data (SPB0DT): Specifies serial port RxD pin input data and TxD pin
output data. The TxD pin output condition is set with the SPB0IO bit (see the description of
SPB0IO above). When the TxD pin is set as an output, the value of the SPB0DT bit is output to
the TxD pin. The RxD pin value is always read from the SPB0DT bit, regardless of the value of
the SPB0IO bit. The initial value of this bit after a power-on reset is undefined.
Bit 0 : SPB0DT
0
1
430
Description
The SPB0DT bit value is not output to the TxD pin.
The SPB0DT bit value is output to the TxD pin.
Description
I/O data level is low.
I/O data level is high.
(Initial value)
(Initial value)

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