HD6417708SF60 Renesas Electronics America, HD6417708SF60 Datasheet - Page 326

• Manufacturer Part Number: HD6417708SF60
• Description: IC SUPERH MPU ROMLESS 144LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

11.2.3
The timer control registers (TCR) control the timer counters (TCNT) and interrupts. The TMU has
three TCR, registers one for each channel.
The TCR registers are 16-bit read/write registers that control the issuance of interrupts when the
flag indicating timer counter (TCNT) underflow has been set to 1, and also carry out counter clock
selection. When the external clock has been selected, they also select its edge. Additionally, TCR2
controls the channel 2 input capture function and the issuance of interrupts during input capture.
The TCRs are initialized to H'0000 by a power-on reset and manual reset. In standby mode, when
the PLL1 multiplication factor is changed in clock mode 0, 1, 2, or 7, or when the MSTP2 bit is
set to 1 in STBCR, the TCRs retain their contents when the input clock selected for the channel is
an external clock (TCLK) or the peripheral clock (Pø), and continue operating when the selected
clock is the on-chip RTC output clock (RTCCLK).
Channel 0 and 1 TCR Bit Configuration:
Channel 2 TCR Bit Configuration:
306
Initial value:
Initial value:
Initial value:
Initial value:
Bit name:
Bit name:
Bit name:
Bit name:
Timer Control Register (TCR)
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
ICPE1
R/W
15
—
—
15
—
0
R
7
0
R
0
R
7
0
ICPE0
R/W
14
—
—
14
—
0
R
6
0
R
0
R
6
0
UNIE
UNIE
R/W
R/W
13
—
13
—
0
R
5
0
0
R
5
0
CKEG1 CKEG0
CKEG1 CKEG0
R/W
R/W
12
—
12
—
0
R
4
0
0
R
4
0
R/W
R/W
11
—
11
—
0
R
3
0
0
R
3
0
TPSC2
TPSC2
R/W
R/W
10
—
10
—
0
R
2
0
0
R
2
0
TPSC1
TPSC1
ICPF
R/W
R/W
R/W
—
9
0
R
1
0
9
0
1
0
TPSC0
TPSC0
UNF
R/W
R/W
UNF
R/W
R/W
8
0
0
0
8
0
0
0