HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 269

• Manufacturer Part Number: HD6417032F20V
• Description: SH1 ROMLESS LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417032F20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 0—Buffer Mode A3 (BFA3): BFA3 selects buffer mode for GRA3 and BRA3 in channel 3.
Bit 0: BFA3
0
1
10.2.5
The timer output control register (TOCR) is an eight-bit read/write register that inverts the output
level in complementary PWM mode/reset-synchronized PWM mode. Setting bits OLS3 and OLS4
is valid only in complementary PWM mode and reset-synchronized PWM mode. In other output
situations, these bits are ignored. TOCR is initialized to H'FF or H'7F by a reset and in standby
mode.
Note: * Undefined
Bits 7–2—Reserved: Bit 7 is read as undefined. Bits 6–2 are always read as 1. The write value to
bit 7 should be 0 or 1. The write value to bits 6–2 should always be 1.
Bit 1—Output Level Select 4 (OLS4): OLS4 selects the output level for complementary PWM
mode or reset-synchronized PWM mode.
Bit 1: OLS4
0
1
Bit 0—Output Level Select 3 (OLS3): OLS3 selects the output level for complementary PWM
mode or reset-synchronized PWM mode.
Bit 0: OLS3
0
1
Bit
Initial value
Read/Write
Timer Output Control Register (TOCR)
Description
GRA3 operates normally in channel 3
GRA3 and BRA3 operate in buffer mode in channel 3
Description
TIOCA3, TIOCA4, and TIOCB4 are inverted and output
TIOCA3, TIOCA4, and TIOCB4 are output directly
Description
TIOCB3, TOCXA4, and TOCXB4 are inverted and output
TIOCB3, TOCXA4, and TOCXB4 are output directly
—
—
7
*
—
—
6
1
—
—
5
1
Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
—
—
4
1
Rev. 7.00 Jan 31, 2006 page 241 of 658
—
—
3
1
—
—
2
1
REJ09B0272-0700
OLS4
R/W
1
1
(Initial value)
(Initial value)
(Initial value)
OLS3
R/W
0
1