HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 432

SH1 ROMLESS LEAD FREE

HD6417032F20V

Manufacturer Part Number
HD6417032F20V
Description
SH1 ROMLESS LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Manufacturer
Quantity
Price
Part Number:
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TI
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HD6417032F20V
Manufacturer:
RENESAS
Quantity:
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Section 13 Serial Communication Interface (SCI)
In receiving, the SCI operates as follows:
1. The SCI synchronizes with serial clock input or output and initializes internally.
2. Receive data is shifted into RSR in order from the LSB to the MSB. After receiving the data,
Rev. 7.00 Jan 31, 2006 page 404 of 658
REJ09B0272-0700
the SCI checks that RDRF is 0 so that receive data can be loaded from RSR into RDR. If this
check passes, the SCI sets RDRF to 1 and stores the received data in RDR. If the check does
ORER
RDRF
Serial
Serial
clock
data
RXI request
Receive direction
Figure 13.18 Sample Flowchart for Serial Receiving (cont)
Bit 7
Figure 13.19 Example of SCI Receive Operation
and clears RDRF to 0
RXI interrupt handler
Bit 0
reads data in RDR
No
1 frame
Clear ORER bit in SSR to 0
Overrun error handling
Bit 7
Error handling
ORER = 1?
End
RXI request
Bit 0
Yes
Bit 1
Bit 6
error, ERI
Overrun
request
Bit 7

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