HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 650

• Manufacturer Part Number: HD6417032F20V
• Description: SH1 ROMLESS LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417032F20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Appendix A On-Chip Supporting Module Registers
Table A.51 TCSR Bit Functions
Bit
7
6
5
2–0
Note: * When the RSTE bit in RSTCSR is 1, an internal reset signal is also generated
Rev. 7.00 Jan 31, 2006 page 622 of 658
REJ09B0272-0700
simultaneously with the WDTOVF signal when TCNT overflows in watchdog timer mode.
Bit Name
Overflow flag (OVF)
Timer mode select (WT/IT)
Timer enable (TME)
Clock select 2–0
(CKS2–CKS0)
Value
0
1
0
1
0
1
0 0 0
0 0 1
0 1 0
0 1 1
0 0 0
0 0 1
0 1 0
0 1 1
Description
No TCNT overflow in interval timer mode
Clear Condition: OVF read, then 0 written in OVF
TCNT overflow generated in interval timer mode
Interval timer mode: When TCNT overflows, interval
timer interrupt (ITI) request sent to CPU (Initial value)
Watchdog timer mode: When TCNT overflows,
WDTOVF signal is output externally *
Timer disable: TCNT initialized at H'00 and count-
up halted
Timer enable: TCNT starts counting up. When
TCNT overflows, a WDTOVF signal or interrupt is
generated
Clock
/2 (Initial value)
/64
/128
/256
/512
/1024
/4096
/8192
Overflow cycle ( =20 MHz)
25.6 µs
819.2 µs
1.6 ms
3.3 ms
6.6 ms
13.1 ms
52.4 ms
104.9 ms
(Initial value)
(Initial value)