UPD78F0555MA-FAA-AX Renesas Electronics America, UPD78F0555MA-FAA-AX Datasheet - Page 352
UPD78F0555MA-FAA-AX
Manufacturer Part Number
UPD78F0555MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0551MA-FAA-AX.pdf
(822 pages)
Specifications of UPD78F0555MA-FAA-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0/Kx2-L
(1) 8-bit timer H compare register 0n (CMP0n)
(2) 8-bit timer H compare register 1n (CMP1n)
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Caution In the PWM output mode and carrier generator mode, be sure to set CMP1n when starting the timer
Remark 78K0/KY2-L, 78K0/KA2-L: n = 1
This register can be read or written by an 8-bit memory manipulation instruction. This register is used in all of the
timer operation modes.
This register constantly compares the value set to CMP0n with the count value of the 8-bit timer counter Hn and,
when the two values match, generates an interrupt request signal (INTTMHn) and inverts the output level of TOHn.
Rewrite the value of CMP0n while the timer is stopped (TMHEn = 0).
A reset signal generation clears this register to 00H.
Caution CMP0n cannot be rewritten during timer count operation. CMP0n can be refreshed (the same value
This register can be read or written by an 8-bit memory manipulation instruction. This register is used in the PWM
output mode and carrier generator mode.
In the PWM output mode, this register constantly compares the value set to CMP1n with the count value of the 8-bit
timer counter Hn and, when the two values match, inverts the output level of TOHn. No interrupt request signal is
generated.
In the carrier generator mode, the CMP1n register always compares the value set to CMP1n with the count value of
the 8-bit timer counter Hn and, when the two values match, generates an interrupt request signal (INTTMHn). At the
same time, the count value is cleared.
CMP1n can be refreshed (the same value is written) and rewritten during timer count operation.
If the value of CMP1n is rewritten while the timer is operating, the new value is latched and transferred to CMP1n
when the count value of the timer matches the old value of CMP1n, and then the value of CMP1n is changed to the
new value. If matching of the count value and the CMP1n value and writing a value to CMP1n conflict, the value of
CMP1n is not changed.
A reset signal generation clears this register to 00H.
count operation (TMHEn = 1) after the timer count operation was stopped (TMHEn = 0) (be sure to set
again even if setting the same value to CMP1n).
78K0/KB2-L, 78K0/KC2-L: n = 0, 1
is written) during timer count operation.
Symbol
CMP0n
Symbol
CMP1n
Address: FF18H (CMP00), FF1AH (CMP01)
Address: FF19H (CMP10), FF1BH (CMP11)
Figure 8-3. Format of 8-Bit Timer H Compare Register 0n (CMP0n)
Figure 8-4. Format of 8-Bit Timer H Compare Register 1n (CMP1n)
7
7
6
6
5
5
4
4
After reset: 00H
After reset: 00H
3
3
CHAPTER 8 8-BIT TIMERS H0 AND H1
2
2
R/W
R/W
1
1
0
0
338
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