UPD78F0555MA-FAA-AX Renesas Electronics America, UPD78F0555MA-FAA-AX Datasheet - Page 575

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UPD78F0555MA-FAA-AX

Manufacturer Part Number
UPD78F0555MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0555MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
(3) Stop condition
Notes 1. To cancel wait, write “FFH” to IICA or set WREL0.
(When 8-Clock and 9-Clock Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (3/3)
INTIICA0
INTIICA0
WREL0
WREL0
ACKD0
ACKE0
MSTS0
SDAA0
ACKD0
ACKE0
MSTS0
WTIM0
WTIM0
SCLA0
Processing by master device
Transfer lines
Processing by slave device
SPD0
TRC0
SPD0
TRC0
STD0
STD0
STT0
SPT0
STT0
SPT0
2. Write data to IICA, not setting WREL0, in order to cancel a wait state during slave transmission.
3. If a wait state during slave transmission is canceled by setting WREL0, TRC0 will be cleared.
IICA
IICA
Receive
Transmit
H
H
L
L
L
Figure 15-34. Example of Slave to Master Communication
IICA
D7
1
data Note 2
D6
2
D5
3
D4
4
D3
5
D2
6
D1
7
D0
8
CHAPTER 15 SERIAL INTERFACE IICA
IICA
NACK
Note 1
9
FFH Note 1
IICA
Note 3
Notes 1, 3
condition
FFH Note 1
Stop
(When SPIE0 = 1)
(When SPIE0 = 1)
Receive
IICA
condition
Start
address
AD6
1
561

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