UPD78F0555MA-FAA-AX Renesas Electronics America, UPD78F0555MA-FAA-AX Datasheet - Page 491

• Manufacturer Part Number: UPD78F0555MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0555MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
(f) Reception error
Three types of errors may occur during reception: a parity error, framing error, or overrun error. If the error flag of
asynchronous serial interface reception error status register 6 (ASIS6) is set as a result of data reception, a
reception error interrupt request (INTSR6/INTSRE6) is generated.
Which error has occurred during reception can be identified by reading the contents of ASIS6 in the reception
error interrupt (INTSR6/INTSRE6) servicing (refer to Figure 14-6).
The contents of ASIS6 are cleared to 0 when ASIS6 is read.
The reception error interrupt can be separated into reception completion interrupt (INTSR6) and error interrupt
(INTSRE6) by clearing bit 0 (ISRM6) of asynchronous serial interface operation mode register 6 (ASIM6) to 0.
1. If ISRM6 is cleared to 0 (reception completion interrupt (INTSR6) and error interrupt (INTSRE6) are
2. If ISRM6 is set to 1 (error interrupt is included in INTSR6)
INTSRE6
INTSRE6
Parity error
Framing error
Overrun error
INTSR6
INTSR6
separated)
(a) No error during reception
(a) No error during reception
Reception Error
The parity specified for transmission does not match the parity of the receive data.
Stop bit is not detected.
Reception of the next data is completed before data is read from receive buffer
register 6 (RXB6).
Figure 14-22. Reception Error Interrupt
Table 14-3. Cause of Reception Error
INTSRE6
INTSRE6
INTSR6
INTSR6
CHAPTER 14 SERIAL INTERFACE UART6
Cause
(b) Error during reception
(b) Error during reception
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