UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 172
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 172 of 1171
- Download datasheet (8Mb)
78K0R/Kx3-L
Address Special Function Register (SFR) Name
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
F01B6H
F01B7H
F01B8H
F01B9H
F01BAH
F01BBH
F01BCH
F01BDH
F01BEH
F01BFH
F01C0H
F01C1H
F01C2H
F01C3H
F01C4H
F01C5H
F01C6H
F01C7H
F01C8H
F01C9H
F01CAH
F01CBH
F01CCH
F01CDH
F01CEH
F01CFH
F01D0H
F01D1H
F01D2H
F01D3H
F01D4H
F01D5H
F01D6H
F01D7H
F01D8H
F01D9H
F01DAH
F01DBH
Timer clock select register 0
Timer output register 0
Timer output enable register 0
Timer output level register 0
Timer output mode register 0
Timer counter register 10
Timer counter register 11
Timer counter register 12
Timer counter register 13
Timer mode register 10
Timer mode register 11
Timer mode register 12
Timer mode register 13
Timer status register 10
Timer status register 11
Timer status register 12
Timer status register 13
Timer channel enable status
register 1
Timer channel start register 1
Table 4-6. Extended SFR (2nd SFR) List (6/8)
TOM0L
TSR10L
TSR11L
TSR12L
TSR13L
TPS0L
TO0L
TOE0L
TOL0L
TCR10
TCR11
TCR12
TCR13
TMR10
TMR11
TMR12
TMR13
TE1L
TS1L
−
−
−
−
−
−
−
−
−
−
−
Symbol
TPS0
TO0
TOE0
TOL0
TOM0 R/W
TSR10
TSR11
TSR12
TSR13
TE1
TS1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
Manipulable Bit Range
1-bit
−
−
−
−
√
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
√
−
√
−
8-bit
√
√
√
√
√
−
−
−
−
−
−
−
−
√
√
√
√
√
√
−
−
−
−
−
−
−
−
−
−
−
16-bit
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
CHAPTER 4 CPU ARCHITECTURE
After Reset
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
FFFFH
FFFFH
FFFFH
FFFFH
√
√
√
√
√
√
√
√
√
√
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
√
√
√
√
√
√
√
√
√
√
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
√
√
√
√
√
√
√
√
√
√
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
√
√
√
√
√
√
√
√
√
√
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
√
√
√
√
√
√
√
√
√
√
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
172
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
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