UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 72
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
2.2.6 P50 to P53 (port 5)
Note TI06/TO06 and TI07/TO07 are shared only in the 78K0R/KC3-L and 78K0R/KD3-L. The 78K0R/KE3-L does not
Remark √: Mounted
(1) Port mode
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P50/TI06/TO06
P51/TI07/TO07
P52/RTC1HZ/
SLTI/SLTO
P53
P50 to P53 function as an I/O port. These pins also function as real-time counter correction clock output and timer I/O.
The following operation modes can be specified in 1-bit units.
(b) TOOL1
P50 to P53 function as an I/O port. P50 to P53 can be set to input or output port in 1-bit units using port mode
register 5 (PM5). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 5 (PU5).
have a sharing function.
This is a clock output pin for a debugger.
When the on-chip debug function is used, the P41/TOOL1 pin can be used as follows by the mode setting on the
debugger.
Caution The function of the P40/TOOL0 pin varies as described in (a) to (c) below.
1-line mode: can be used as a port (P41).
2-line mode: used as a TOOL1 pin and cannot be used as a port (P41).
In the case of (b) or (c), make the specified connection.
(a) In normal operation mode and when on-chip debugging is disabled (OCDENSET = 0) by an
(b) In normal operation mode and when on-chip debugging is enabled (OCDENSET = 1) by an
(c) When on-chip debug function is used, or in write mode of flash memory programmer
(
μ PD78F100y: y = 0 to 3)
40-pin
option byte (000C3H)
=> Use this pin as a port pin (P40).
option byte (000C3H)
=> Connect this pin to V
=> Use this pin as TOOL0.
−
78K0R/KC3-L
before reset release.
Directly connect this pin to the on-chip debug emulator or a flash memory programmer,
or pull it up by connecting it to V
√
√
−
CHAPTER 2 PIN FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
44-pin
√
(
μ PD78F100y: y = 1 to 3)
78K0R/KC3-L (48-pin)
DD
via an external resistor, and always input a high level to the pin
√
√
√
−
DD
via an external resistor.
(
μ PD78F100y: y = 4 to 6)
78K0R/KD3-L
√
√
√
−
(
μ PD78F100y: y = 7 to 9)
78K0R/KE3-L
P51
P50
√
√
Note
Note
72
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