UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 927
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
Notes 1.
Remark The special function register (SFR) mounted depend on the product. See 4.2.4 Special function registers
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM
Processor mode control register (PMC)
Port registers (P0 to P9, P11 to P15) (output latches)
Port mode registers
Port input mode registers 0, 1, 3, 7, 8, 14 (PIM0, PIM1, PIM3, PIM7, PIM8, PIM14)
Port output mode registers 0, 1, 3, 7, 14 (POM0, POM1, POM3, POM7, POM14)
Pull-up resistor option registers (PU0, PU1, PU3 to PU9, PU11 to PU14)
Clock operation mode control register (CMC)
Clock operation status control register (CSC)
System clock control register (CKC)
20 MHz internal high-speed oscillation control register (DSCCTL)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
Noise filter enable registers 0, 1, 2 (NFEN0, NFEN1, NFEN2)
Peripheral enable registers 0, 1, 2 (PER0, PER1, PER2)
Operation speed mode control register (OSMC)
Timer array unit
2.
3.
During reset signal generation or oscillation stabilization time wait, only the PC contents among the hardware
statuses become undefined. All other hardware statuses remain unchanged after reset.
When a reset is executed in the standby mode, the pre-reset status is held even after reset.
In the 78K0R/KC3-L, 78K0R/KD3-L, and 78K0R/KE3-L, the reset value of the PM14 register is FEH. In the
78K0R/KF3-L and 78K0R/KG3-L, the reset value of the PM13 register is FEH.
(SFRs) and 4.2.5 Extended special function registers (2nd SFRs: 2nd Special Function Registers).
Timer data registers 00 to 07, 10 to 13 (TDR00 to TDR07, TDR10 to TDR13)
Timer mode registers 00 to 07, 10 to 13 (TMR00 to TMR07, TMR10 to TMR13)
Timer status registers 00 to 07, 10 to 13 (TSR00 to TSR07, TSR10 to TSR13)
Timer input select registers 0, 1 (TIS0, TIS1)
Timer counter registers 00 to 07, 10 to 13 (TCR00 to TCR07, TCR10 to TCR13)
Timer channel enable status registers 0, 1 (TE0, TE1)
Timer channel start registers 0, 1 (TS0, TS1)
Timer channel stop registers 0, 1 (TT0, TT1)
Timer clock select registers 0, 1 (TPS0, TPS1)
Timer output registers 0, 1 (TO0, TO1)
Timer output enable registers 0 , 1(TOE0, TOE1)
Timer output level registers 0, 1 (TOL0, TOL1)
Timer output mode registers 0, 1 (TOM0, TOM1)
Data memory
General-purpose registers
PM0 to PM9, PM11 to PM15
Table 21-2. Hardware Statuses After Reset Acknowledgment (1/4)
Hardware
Note 3
CHAPTER 21 RESET FUNCTION
The contents of the
reset vector table
(0000H, 0001H) are set.
Undefined
06H
Undefined
Undefined
00H
00H
FFH
00H
00H
00H
00H
C0H
09H
00H
00H
07H
00H
00H
00H
0000H
0000H
0000H
00H
FFFFH
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
Acknowledgment
After Reset
Note 2
Note 2
Note 1
927
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