UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 987
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
26.7 Security Settings
memory, so that the program cannot be changed by an unauthorized person.
programming mode is set next.
setting when the flash memory is shipped. Security can be set by on-board/off-board programming and self programming.
Each security setting can be used in combination.
enabled.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
The 78K0R/Kx3-L supports a security function that prohibits rewriting the user program written to the internal flash
The operations shown below can be performed using the Security Set command. The security setting is valid when the
• Disabling batch erase (chip erase)
• Disabling block erase
• Disabling write
• Disabling rewriting boot cluster 0
The batch erase (chip erase), block erase, write commands, and rewriting boot cluster 0 are enabled by the default
All the security settings are cleared by executing the batch erase (chip erase) command.
Table 26-8 shows the relationship between the erase and write commands when the 78K0R/Kx3-L security function is
Remark To prohibit writing and erasing during self-programming, use the flash sealed window function (see 26.9.2 for
Execution of the block erase and batch erase (chip erase) commands for entire blocks in the flash memory is
prohibited by this setting during on-board/off-board programming. Once execution of the batch erase (chip erase)
command is prohibited, all of the prohibition settings (including prohibition of batch erase (chip erase)) can no longer
be cancelled.
Execution of the block erase command for a specific block in the flash memory is prohibited during on-board/off-board
programming. However, blocks can be erased by means of self programming.
Execution of the write and block erase commands for entire blocks in the flash memory is prohibited during on-
board/off-board programming. However, blocks can be written by means of self programming.
Execution of the batch erase (chip erase) command, block erase command, and write command on boot cluster 0
(00000H to 00FFFH) in the flash memory is prohibited by this setting.
Caution After the security setting for the batch erase is set, erasure cannot be performed for the device. In
detail).
addition, even if a write command is executed, data different from that which has already been
written to the flash memory cannot be written, because the erase command is disabled.
CHAPTER 26 FLASH MEMORY
987
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