UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 369
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 369 of 1171
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78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Subsystem clock (f
oscillation clock (f
<1> When the power is turned on, an internal reset signal is generated by the low-voltage detector (LVI) circuit.
(when XT1 oscillation
<2> When the power supply voltage exceeds 2.07 V (TYP.), the reset is released and the internal high-speed
<3> After the reset is released and reset processing is performed, the CPU starts operation on the internal high-speed
<4> Set the start of oscillation of the X1 or XT1 clock
<5> When switching the CPU clock to the X1 or XT1 clock
(when X1 oscillation
Internal reset signal
Internal high-speed
oscillation clock (f
system clock (f
20 MHz internal
oscillator
oscillation clock
clock and 7.6.5 Example of setting XT1 oscillation clock).
Switch to oscillation using the 20 MHz internal high-speed oscillation clock after setting the DSCON bit to 1 by
using software.
switching via software (see 7.6.4 Example of setting X1 oscillation clock and 7.6.5 Example of setting XT1
oscillation clock).
Switch to the 20 MHz internal high-speed oscillation clock after confirming that the power supply voltage is at
least 2.7 V, setting the DSCON bit (bit 0 of the 20 MHz internal high-speed oscillation control register (DSCCTL)),
waiting for 100
(Notes and Cautions are listed on the next page.)
Power supply
voltage (V
high-speed
High-speed
CPU clock
selected)
selected)
IH20
SUB
0 V
DD
Figure 7-17. Clock Generator Operation When Power Supply Voltage Is Turned On
MX
IH
)
)
Note 3
)
)
)
(When LVI Default Start Function Enabled Is Set (Option Byte: LVIOFF = 0))
automatically starts oscillation.
μ
Note 3
s, and then setting the SELDSC bit to 1 by using software
.
2.07 V
<1>
Note 1
<2>
is set by software.
<3>
DSCON = 1
1 or 8 MHz internal high-
Reset processing
speed oscillation clock
(195 to 341 s)
<4>
μ
20 MHz internal high-speed oscillation clock
oscillation stabilization time : 100 s
Note 4
<5>
via software (see 7.6.4 Example of setting X1 oscillation
is specified by software.
Note 4
speed oscillation clock
SELDSC = 1
20 MHz internal high-
Starting X1 oscillation
is specified by software.
Starting XT1 oscillation
, wait for the clock oscillation to stabilize, and then set
<4>
μ
Switched by
CHAPTER 7 CLOCK GENERATOR
1 or 8 MHz internal high-
software
speed oscillation clock
<4>
Note 5
X1 clock
oscillation stabilization time
.
<5>
system clock
High-speed
Note 2
<5>
Subsystem
clock
369
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